component

LDK320AU50R

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ldk320au50rfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

LDK320AU50R

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89

LDK320AU50R from STMicroelectronics, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Output voltage of the LDO, delivering up to 200 mA of output current.
2 GND power_in Common ground for the LDO.
3 IN power_in Input voltage of the LDO, operating from 2.5 V to 18 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-89
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage accuracy, LDK320A VOUT -0.5 0.5 % TJ = 25 °C 6
Output voltage accuracy, LDK320A VOUT -1.5 1.5 % -40 °C < TJ < 125 °C 6
Operating input voltage VIN 2.5 18 V 6
Enable input logic high VEN 1.2 V VIN = 2.5 V to 18 V, -40 °C < TJ < 125 °C 7
Enable input logic low VEN 0.4 V VIN = 2.5 V to 18 V, -40 °C < TJ < 125 °C 7
Output capacitor capacitance COUT 1 22 µF Capacitance (see Section 6 Typical characteristics) 7
Static line regulation ΔVOUT 0.001 0.05 %/V VOUT +1 V ≤ VIN ≤ 18 V 6
Static load regulation (SOT-89), VOUT > 2 V ΔVOUT 0.001 0.004 %/mA IOUT = 1 mA to 200 mA, VOUT > 2 V 6
Dropout voltage VDROP 200 350 mV IOUT = 200 mA, VOUT = 3.3 V, 40 °C < TJ < 125 °C 6
Quiescent current IQ 60 90 µA VOUT +1 V ≤ VIN ≤ 18 V, IOUT = 0 mA, -40 °C < TJ < 125 °C 6
Quiescent current IQ 70 100 µA VIN = VOUT +1 V, IOUT = 200 mA, -40 °C < TJ < 125 °C 6
VIN input current in OFF mode 0.2 1 µA VEN = GND, TJ = 25 °C 6
Enable pin input current IEN 0.1 100 nA VEN = VIN 7
Operating input voltage (absolute maximum) VIN -0.3 20 V DC input voltage 5
DC output voltage VOUT -0.3 V upper limit VI + 0.3 V 5
Enable input voltage VEN -0.3 V upper limit VI + 0.3 V 5
Storage temperature range TSTG -65 150 °C 5
Operating junction temperature range TOP -40 125 °C 5
Thermal resistance junction-ambient RthJA 110 °C/W SOT-89 5
Thermal resistance junction-case RthJC 15 °C/W SOT-89 5

CAD (KiCad official)

  • Symbol: LDK320AU50R
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: ldk320au50r-etched.step / ldk320au50r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ldk320au50r.step / ldk320au50r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (32 pp, sha256 26f60da8e9021885, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF