component

LDK120M-R

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STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)ldk120m-rfactory-2.0.0extractor-text

Verified LDK120M-R

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier mfr, 5 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LDK120M-R · SOT-23-5 · 5 pins
  • ✓copper: 5 copper pads, none touching another net
  • ✓datasheet: all 5 pin names found in the 24-page datasheet
  • ✓distributor: lcsc C2970342, digikey 497-13501-2-ND, mouser 511-LDK120M-R
  • ✓family: SOT-23-5
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-8osyiz19/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 5 pins = 5 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 5 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ldk120m-r.kicad_sym✓ ldk120m-r.kicad_mod✓ ldk120m-r.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers ldk120m-r: viewers · Ray 1d ago
ldk120m-r-etched.glb Publish 0.1.0 · Ray 1d ago
ldk120m-r-etched.step ldk120m-r: factory component page (tier=mfr) · Ray 1d ago
ldk120m-r-hero.glb ldk120m-r: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
ldk120m-r-hero.overlay.json Publish 0.1.0 · Ray 1d ago
ldk120m-r.glb Publish 0.1.0 · Ray 1d ago
ldk120m-r.kicad_mod Publish 0.1.0 · Ray 1d ago
ldk120m-r.kicad_sym Publish 0.1.0 · Ray 1d ago
ldk120m-r.lbr Publish 0.1.0 · Ray 1d ago
ldk120m-r.step Publish 0.1.0 · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier mfr, 5 pins · Ray 1d ago

LDK120M-R

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

LDK120M-R from STMicroelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input voltage of the LDO, operating from 1.9 V to 5.5 V with a DC input voltage absolute maximum of 7 V.
2 GND power_in Common ground for the regulator.
3 EN input Enable logic input: Low = shutdown, High = active, with enable logic low maximum 0.4 V and logic high minimum 1.2 V.
4 ADJ input Adjust pin for setting the output voltage via VOUT = VADJ(1+R1/R2) with VADJ of 800 mV typical, adjust pin current 1 µA, and ADJ/bypass pin voltage limited to 2 V maximum.
5 OUT power_out Output voltage of the LDO, with 200 mA guaranteed output current.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating input voltage VIN 1.9 5.5 V 8
VADJ accuracy VADJ 784 800 816 mV IOUT=1 mA, TJ=25 °C 8
VADJ accuracy VADJ -3 3 % IOUT=1 mA, -40 °C<TJ<125 °C 8
Output capacitor COUT 1 22 µF Capacitance (see Section 6: Typical performance characteristics) 8
Enable input logic high VEN 1.2 V VIN=1.9 V to 5.5 V, -40 °C<TJ<125 °C 8
Enable input logic low VEN 0.4 V VIN=1.9 V to 5.5 V, -40 °C<TJ<125 °C 8
Quiescent current IQ 30 60 µA IOUT=0 mA, -40 °C<TJ<125 °C 8
Quiescent current IQ 50 100 µA IOUT=200 mA, -40 °C<TJ<125 °C 8
Enable pin input current IEN 100 nA VSHDN=VIN 8
Short-circuit current ISC 400 mA RL=0 8
VIN input current in OFF mode VIN 1 µA VEN=GND 8
Static line regulation VOUT 0.05 %/V VOUT +1 V ≤ VIN ≤ 5.5 V, IOUT=1 mA 8
Static load regulation VOUT 0.006 %/mA IOUT=1 mA to 200 mA 8
Dropout voltage VDROP 100 mV IOUT=100 mA, VOUT=2.5 V 8
Dropout voltage VDROP 150 300 mV IOUT=200 mA, VOUT=2.5 V, 40 °C<TJ<125 °C 8
Output noise voltage eN 115 µVRMS 10 Hz to 100 kHz, IOUT=10 mA, VOUT=VADJ 8
Adjust pin current IADJ 1 µA 8
Supply voltage rejection SVR 55 dB VIN=VOUTNOM+0.5 V±VRIPPLE, VRIPPLE=0.1 V, Freq.=120 Hz to 10 kHz, IOUT=10 mA 8
Thermal shutdown TSHDN 160 °C 8
Thermal shutdown hysteresis TSHDN 20 °C Hysteresis 8
DC input voltage VIN -0.3 7 V 6
DC output voltage VOUT -0.3 V to VI + 0.3 V 6
Enable input voltage VEN -0.3 V to VI + 0.3 V 6
ADJ/Bypass pin voltage VBYP/ADJ 2 V 6
Storage temperature range TSTG -65 150 °C 6
Operating junction temperature range TOP -40 125 °C 6
Thermal resistance junction-ambient (SOT23-5L) RthJA 160 °C/W SOT23-5L 6
Thermal resistance junction-case (SOT23-5L) RthJC 68 °C/W SOT23-5L 6

CAD (KiCad official)

  • Symbol: LDK120M-R
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ldk120m-r-etched.step / ldk120m-r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ldk120m-r.step / ldk120m-r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (24 pp, sha256 1684d802fa69801e, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF