Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

LD7792NGS1

Leadtrend Tech · AC-DC Controllers & Regulators · SOP-16

LD7792NGS1 from Leadtrend Tech, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Supply voltage pin.
2 GND power_in Ground.
3 FBCOMP input Voltage feedback pin for the Flyback stage; connect a photo-coupler to close the control loop and achieve regulation.
4 FBAUX input Zero current detection and over voltage protection input for the Flyback unit.
5 OTP input External OTP protection pin.
6 PFCCOMP passive Output of the error amplifier for PFC voltage loop compensation.
7 PFCONOFF input Threshold voltage setting of FBCOMP for PFC ON/OFF loading control.
8 PFCAUX input Zero current detection input for the PFC unit.
9 VOSENSE input Voltage sense for PFC output, regulation voltage is 2.5V.
10 FBSENSE input Current sense pin; connect it to sense the Flyback MOSFET current.
11 PFCSENSE input Current sense pin; connect it to sense the PFC MOSFET current.
12 PFCDRIVER output Gate drive output to drive the external MOSFET for the PFC unit.
13 FBDRIVER output Gate drive output to drive the external MOSFET for the Flyback unit.
14 CT passive Timer setting for Open Loop Protection, PFC light-load turn-off and Flyback soft-start.
15 NC unconnected Unconnected pin.
16 HV input Connect to Bridge + or Line/Neutral of AC/DC mains through a resistor for startup current; turned off when VCC reaches UVLO(on), and detects AC peak voltage for brown in/out and high/low line detection.

Key specifications

Parameter Value
Manufacturer Leadtrend Tech
Package SOP-16
Category Power Supply Chip
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC supply voltage VCC -0.3 35 V 5
HV pin voltage HV -0.3 650 V 5
Signal pins voltage -0.3 6 V FBCOMP, PFCCOMP, FBSENSE, PFCSENSE, FBAUX, PFCAUX, VOSENSE, OTP, CT, PFCONOFF 5
Driver pins voltage -0.3 20 V FBDRIVER, PFCDRIVER 5
Maximum junction temperature 150 °C 5
Storage temperature range -65 150 °C 5
Power dissipation 363 mW SOP-16, at Ambient Temperature = 85C 5
Thermal resistance junction-ambient θJA 110 °C/W SOP-16 5
Thermal resistance junction-case θJC 36 °C/W SOP-16 5
Lead temperature 260 °C Soldering, 10sec 5
ESD HBM pins 3-11 & 14 3.5 kV Human Body Model 5
ESD HBM pins 1, 12, 13 2.5 kV Human Body Model 5
ESD HBM pin 16 1 kV Human Body Model 5
ESD Machine Model 250 V except HV pin 5
Operating junction temperature -40 125 °C 5
Supply voltage VCC VCC 10 28 V 5
VCC capacitor 10 56 µF 5
HV pin resistor 10 20 kΩ 5
HV pin capacitor 220 pF 5
PFCCOMP capacitor 0.22 2.2 µF 5
FBCOMP capacitor 10 100 nF 5
VOSENSE capacitor 0.1 10 nF 5
PFCAUX pin resistor 10 51 kΩ 5
PFCAUX current setting 1.5 mA 5
HV startup current source IHV1 1 1.5 2 mA VCC < PDR, VHV = 80V 6
HV current VCC > PDR IHV3 5 mA VCC > PDR, VHV = 80V 6
HV off-state leakage current IHVOFF500 32 µA After UVLO(on), VHV = 500V 6
Brown-in level VBNI 95 105 115 V 6
Brown-out level VBNO 75 85 95 V 6
High line trip level VHLINE 215 230 245 V 6
Low line trip level VLLINE 195 210 225 V 6
High line threshold - low line level VLINHYS 10 20 V 6
Holding current before UVLO(on) IVCCST 150 µA VCC < UVLO (on) 6
VCC latch current IVCCLCH 300 µA VCC < UVLO (on), VLATCH = 0V 6
Operating current, PFC & Flyback off IVCCBST 1.3 mA VFBCOMP = 0V, PFC & Flyback OFF 6
Operating current, PFC & Flyback on IVCC3 2 mA VFBCOMP = 3V, PFC & Flyback ON 6
UVLO (off) VUVOFF 7.5 8 8.5 V -20C ~125C 6
UVLO (on) VUVON 17 18 19 V -20C ~125C 6
VCC OVP level VCCOVP 30.5 31.5 32.5 V 6
Power down reset voltage PDR 6 7 8 V 6
Source current for PFC OFF threshold IPFCOFF 23 24.5 26 µA 6
OTP pin source current IOTP 75 80 85 µA 7
External OTP turn-on trip level VOTPON 1.05 1.1 1.15 V 7
External OTP turn-off trip level VOTPOFF 0.9 1 1.1 V 7
OTP pin de-bounce time TDOTPOFF 400 500 600 µs Disable (High to Low) 7
Reference input voltage VFBREF 2.47 2.5 2.53 V TJ=-20C ~125C 7
PFC OVP trip level VPFCOVP 2.59 2.63 2.67 V 7
PFC OVP hysteresis VPFCOVPHYS 0.115 0.13 0.145 V 7
PFC enable threshold VPFCEN 1 1.1 1.2 V 7
PFC disable threshold VPFCENL 0.8 0.9 1 V 7
VOSENSE pull down resistance RVOSENSE 5 6 7 MΩ 7
Output low level VOUTH1 0 1.5 V VCC=15V, ISINK=100mA 10
Output high clamp level VOUTCL 11 13 15 V VCC=17V 10
Rising time TOUTR 200 ns VCC =15V,CL=3000pF 10
Falling time TOUTF 50 ns VCC =15V,CL=3000pF 10
OTP level TSHUTDOWN 140 °C 10
OTP hysteresis TRESTART 40 °C 10

CAD (KiCad official)

  • Symbol: LD7792NGS1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: ld7792ngs1-etched.step / ld7792ngs1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ld7792ngs1.step / ld7792ngs1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Leadtrend Tech datasheet (29 pp, sha256 5a1cbbd6cc4d0484, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF