component
LD7575PN
Public Made by Adomby adom
Leadtrend Tech AC-DC Controllers And Regulators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "ld7575pn",
"version": "0.1.0",
"type": "component",
"description": "Leadtrend Tech AC-DC Controllers And Regulators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"ld7575pn",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
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"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ld7575pn.kicad_sym",
"ld7575pn.kicad_mod",
"ld7575pn.glb",
"ld7575pn.step",
"ld7575pn.lbr",
"docs/hero.png",
"docs/ld7575pn-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"ld7575pn-hero.glb",
"ld7575pn-hero.overlay.json",
"ld7575pn-etched.glb"
],
"component": {
"mpn": "LD7575PN",
"manufacturer": "Leadtrend Tech",
"package": "DIP-8",
"pin_count": 8,
"category": "Power Management (PMIC)",
"subcategory": "AC-DC Controllers And Regulators",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941210182692864",
"parts": {
"symbol": "ld7575pn.kicad_sym",
"footprint": "ld7575pn.kicad_mod",
"model_3d": "ld7575pn-hero.glb",
"model_3d_plain": "ld7575pn-etched.glb",
"model_3d_step": "ld7575pn-etched.step",
"model_3d_step_plain": "ld7575pn.step",
"lbr": "ld7575pn.lbr"
},
"distributor_links": {
"lcsc": "C13680"
},
"distributor_check": {
"checked_at": "2026-10-19T09:09:19Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "error"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "RT",
"type": "input",
"description": "Programs the switching frequency through a resistor to ground, with f_SW = 65.0 kHz × (100 kΩ / RT) and a suggested operating range of 50 kHz to 130 kHz."
},
{
"number": "2",
"name": "COMP",
"type": "input",
"description": "Voltage feedback input from the secondary-side TL431 through a photocoupler; pulling it below 1.2 V turns the gate output off, and VCOMP held above the 5.0 V OLP threshold for more than 30 ms activates over-load protection."
},
{
"number": "3",
"name": "CS",
"type": "input",
"description": "Current sense input for peak-current control and pulse-by-pulse limiting, with a maximum threshold of 0.85 V and 350 ns leading-edge blanking; an R-C filter is strongly recommended in higher-power designs to keep the negative turn-on spike above -0.3 V."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the controller and the gate driver."
},
{
"number": "5",
"name": "OUT",
"type": "output",
"description": "Gate drive output (CMOS buffer, typical 500 mA drive capability) that drives the external power MOSFET directly, with a gate pull-low resistor recommended for fault protection."
},
{
"number": "6",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage pin with a recommended range of 11 V to 25 V and a Vcc capacitor of 10 µF to 47 µF; UVLO turns on at 16 V and off at 10 V, and OVP trips at 27.5 V typical (absolute maximum 30 V)."
},
{
"number": "7",
"name": "NC",
"type": "unconnected",
"description": "Unconnected pin; no electrical connection is specified."
},
{
"number": "8",
"name": "HV",
"type": "input",
"description": "Connect to the positive terminal of the bulk capacitor to supply start-up current (HV rated -0.3 V to 500 V); the HV current source turns off once VCC reaches UVLO(on), and a 10 kΩ series resistor is recommended on the Hi-V path."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The schema has no spec field, so no headline electrical specs were returned; limits quoted in pin de; Pin types are inferred from function, not stated by the datasheet: RT, COMP, CS and HV are typed as ; The top-view pin diagram on page 2 was flattened to text; the pin-number-to-name mapping was taken f"
],
"pages_sent": 18,
"cost_usd": 0.0649,
"at": "2026-10-19T09:07:04"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941210182692864",
"pages": 18,
"sha256": "52a54b667919e381",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
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"footprint": "viewers/footprint.html"
},
"models_3d": [
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"role": "plain",
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"units": "mm",
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"extents_mm": [
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"zmin_mm": -3.3,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "4a377a56a8d9e9c0b86c095ef9ecc1869ac19e7f5069a3247b294250bf4f235d",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ld7575pn-etched.step",
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"sha256": "4857f5282434a5df7f3595e57594fae8a677c7818e142173abd593961d02bf0b",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
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}
}