component
LD6802JGL
Public Made by Adomby adom
Leadtrend Tech LED Drivers, SOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLD6802JGL
Leadtrend Tech · LED Drivers · SOT-26
LD6802JGL from Leadtrend Tech, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power supply for the device with an internal zener clamp (VIN_CLAMP 29.0 to 32.0 V, 30.5 V typ) for wide-range LED light bar voltage, with an operation range of 9 to 30 V and a 1 to 4.7 µF filter capacitor to GND. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | REF | passive | LED reference voltage that must be bypassed with a ceramic capacitor of 0.47 to 1.5 µF to GND to filter the 100/120 Hz ripple, regulated to 2.10 to 2.40 V (2.25 V typ). |
| 4 | OUT | output | Gate drive output connected to the external MOSFET gate to regulate LED current ripple, with a maximum output voltage of 5.0 to 7.5 V (6.0 V typ). |
| 5 | OCP | input | LED current feedback and maximum LED current limit input, internally limited to 0.27 to 0.37 V (0.32 V typ) across the sense resistor ROCP. |
| 6 | OVP | input | Over-voltage protection input for short and open LED protection, with the OVP pin absolute maximum rated at -0.3 V to 8 V and a resistance to GND (RTRIAC) of 750 to 1500 kΩ. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leadtrend Tech |
| Package | SOT-26 |
| Category | LED Drivers |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Junction Temperature | -40 | 125 | C | Note3,Note5 | 4 | ||
| VIN Operation Range | 9 | 30 | V | 4 | |||
| VIN Operation Current | 0.5 | 2.5 | mA | 4 | |||
| VIN pin Filter Capacitor to GND | 1 | 4.7 | F | 4 | |||
| REF pin Capacitor to GND | 0.47 | 1.5 | F | 4 | |||
| OCP pin Filter Resistance (*ROCP) | 1 | kΩ | 4 | ||||
| OVP pin Resistance to GND (*RTRIAC) | 750 | 1500 | kΩ | 4 | |||
| Zener Diode Voltage (DZ) between gate and source of NMOS | DZ | 5.6 | 7.5 | V | 4 | ||
| VIN | -0.3 | 33 | V | 4 | |||
| VIN Shunt Regulation Pull-down Current | 3 | mA | 4 | ||||
| VIN Shunt Regulation Pull-down Current | 1.5 | mA | 4 | ||||
| OVP | -0.3 | 8 | V | 4 | |||
| OCP, OUT | -0.3 | 16 | V | 4 | |||
| REF | -0.3 | 6 | V | 4 | |||
| Maximum Junction Temperature | 150 | C | 4 | ||||
| Storage Temperature Range | -65 | 150 | C | 4 | |||
| Package Thermal Resistance (SOT-26) | JA | 200 | C/W | SOT-26 | 4 | ||
| Power Dissipation (SOT-26) | 200 | mW | Tj=125oC, Ta=85C | 4 | |||
| Lead temperature (Soldering, 10sec) | 260 | C | Soldering, 10sec | 4 | |||
| ESD Voltage Protection, Human Body Model | 2.5 | KV | 4 | ||||
| ESD Voltage Protection, Machine Model | 250 | V | 4 | ||||
| Shunt Regulator Voltage | VIN_CLAMP | 29 | 30.5 | 32 | V | *; When shunt regulation pull-down current is ~2mA | 5 |
| Shunt Regulator Pull-Down Current | IIN_SINK | 2 | 3 | mA | VIN = 33V, RIN=1KΩ | 5 | |
| UVLO(OFF) | VUV_OFF | 4.5 | 5.5 | 6.5 | V | 5 | |
| UVLO(ON) | VUV_ON | 6.5 | 7.5 | 8.5 | V | 5 | |
| Maximum Output voltage | VOUT | 5 | 6 | 7.5 | V | 5 | |
| Over Current Limited Threshold Voltage | VOCP_LIM | 0.27 | 0.32 | 0.37 | V | After VCC ≧ VUV_ON | 5 |
| LED Reference Voltage to LED Current rate (Ratio VREF/VOCP) | K | 9.5 | 10 | 10.5 | - | Ratio is VREF/ VOCP | 5 |
| Enable Output Current by REF Voltage | VCOMP_L | 1.4 | 1.55 | 1.7 | V | Increase source current beginning level ; ICOMP ≧ 0.1uA | 5 |
| REF Regulation Operation Voltage | VREF_CLAMP | 2.1 | 2.25 | 2.4 | V | Normal operation mode | 5 |
| REF Max. Clamp Voltage | VREF_MAX | 2.4 | 3.2 | V | 5 | ||
| Internal REF Voltage when Open LED Protection is triggered | VREF_OPEN | 0.85 | 1 | 1.15 | V | When OVP pin is pull to GND | 5 |
| Internal REF Voltage when Short LED Protection is triggered | VREF_SHORT | 1.8 | 2 | 2.3 | V | Here is de-bounce ~8s | 5 |
| Over Voltage Protection Drain voltage Threshold | VOVP_DRAIN | 5 | 6 | 7 | V | When ROVP=100Kohm | 6 |
| Short LED Protection Sink Current | IOVP | 25 | 30 | 35 | uA | 6 | |
| Short LED Protection Delay Time | TON_SHORT | 120 | 280 | 480 | s | 6 | |
| Short LED Protection Reset Time | TOFF_SHORT | 120 | 280 | 480 | ms | 6 | |
| LED Open Protection Threshold Voltage | VOVP_LOW | 2 | 8 | 15 | mV | 6 |
CAD (KiCad official)
- Symbol:
LD6802JGL - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-26 (KiCad packages3D, STEP)
- 3D model files:
ld6802jgl-etched.step/ld6802jgl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ld6802jgl.step/ld6802jgl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leadtrend Tech datasheet (13 pp, sha256
bfd394f584125a1f, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).