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LD5535E1GL
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Leadtrend Tech AC-DC Controllers And Regulators, SOT-26-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LD5535E1GL
Leadtrend Tech · AC-DC Controllers And Regulators · SOT-26-6
LD5535E1GL from Leadtrend Tech, in a SOT-26-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the controller. |
| 2 | COMP | input | Voltage feedback pin (same as the COMP pin in UC384X) that connects to a photo-coupler to close the control loop and achieve regulation. |
| 3 | OTP | input | Pulling this pin below 0.95V latches the controller off until AC power is cycled; an NTC to ground gives over-temperature protection, and floating it or using a 100k resistor disables the latch protection. |
| 4 | CS | input | Current sense pin that senses the MOSFET current for peak-current and pulse-by-pulse limit; absolute maximum rating is -0.3V to 6V. |
| 5 | VCC | power_in | Supply voltage pin; recommended operating range is 8.5V to 26.5V with an absolute maximum of 30V. |
| 6 | OUT | output | Gate drive output that drives the external power MOSFET; absolute maximum range is -0.3V to VCC+0.3V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leadtrend Tech |
| Package | SOT-26-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Junction Temperature | TJ | -40 | 125 | C | 4 | ||
| Supply VCC Voltage | VCC | 8.5 | 26.5 | V | 4 | ||
| VCC Capacitor | 3.3 | 10 | F | Printed unit glyph is missing in extracted text; micro prefix not confirmed | 4 | ||
| Start-up resistor Value (AC Side, Half Wave) | 540 | 2.2 | K / M (as printed) | AC side, half wave; printed as 540K and 2.2M | 4 | ||
| COMP Pin Capacitor | 1 | 10 | nF | 4 | |||
| CS Pin Capacitor Value | 47 | 390 | pF | 4 | |||
| Supply Voltage VCC | VCC | -0.3 | 30 | V | 4 | ||
| COMP, CS, OTP pin voltage | COMP, CS, OTP | -0.3 | 6 | V | 4 | ||
| OUT pin voltage | OUT | -0.3 | V | Upper limit printed as VCC+0.3V | 4 | ||
| Maximum Junction Temperature | 150 | C | 4 | ||||
| Storage Temperature Range | -65 | 150 | C | 4 | |||
| Lead temperature (Soldering) | 260 | C | Soldering, 10 sec | 4 | |||
| ESD Voltage Protection, Human Body Model | 2.5 | kV | Human body model | 4 | |||
| ESD Voltage Protection, Machine Model | 250 | V | Machine model | 4 | |||
| Power Dissipation (SOT-26) | 200 | mW | Ambient Temperature = 85C | 4 | |||
| UVLO(OFF) | VCCOFF | 6.5 | 7.5 | 8.5 | V | OUT OFF | 5 |
| UVLO(ON) | VCCON | 15 | 16 | 17 | V | 5 | |
| VCC OVP Level | VCCOVP | 27 | 28 | 29 | V | 5 | |
| Maximum Input Voltage (VCS_MIN) | VCS_MIN | 0.59 | 0.69 | 0.79 | V | For High Line | 5 |
| Maximum Input Voltage (VCS_OFF) | VCS_LIMIT | 0.82 | V | 5 | |||
| Output High Level | VOH | 9 | 14 | V | VCC =15V, Io=20mA | 5 | |
| Output High Clamp Level | VO_CLAMP | 10.5 | 11.5 | 12.5 | V | VCC =18V | 5 |
| CCM Frequency | FCCM | 60 | 65 | 70 | kHz | 6 | |
| Frequency Swapping | FSW_MOD | -8 | 8 | % | Guaranteed by design | 6 | |
| Green Mode Frequency | FSW_GREEN | 21 | 24 | 27 | kHz | 6 | |
| Temp. Stability | FSW_TS | 3 | 5 | % | Guaranteed by design | 6 | |
| Maximum Duty | DMAX | 81 | % | Guaranteed by design | 6 | ||
| OTP Pin Source Current | IOTP | 90 | 100 | 110 | A | Micro prefix missing in extracted text | 6 |
| Startup Current | ICC_ST | 1 | A | VCC < UVLO(ON); micro prefix missing in extracted text | 5 | ||
| Operating Current (with 1nF load on OUT Pin) | ICC_OP1 | 0.285 | mA | VCOMP=0V, OUT=1nF | 5 | ||
| Operating Current (with 1nF load on OUT Pin) | ICC_OP2 | 1.9 | mA | VCOMP=1.7V, OUT=1nF | 5 | ||
| Auto current protection | ICC_OPA1 | 0.6 | mA | 5 | |||
| VCC OVP de-bounce time | TVCC_OVP | 8 | Cycle | 5 | |||
| Short Circuit Current | ICOMP | 0.11 | mA | VCOMP=0V | 5 | ||
| Open Loop Voltage | VCOMP_OPEN | 3.15 | V | 5 | |||
| Zero Duty Threshold VCOMP | VZDC | 0.5 | V | 5 | |||
| Zero Duty Hysteresis | VZDCH | 100 | mV | 5 | |||
| Leading Edge Blanking Time | TLEB | 200 | ns | 5 | |||
| Internal Slope Compensation | VSLP_L | 330 | mV | 0% to DMAX. (Linearly increase); guaranteed by design | 5 | ||
| Input impedance | ZCS | 1 | M | Guaranteed by design; unit printed as M (Ohm symbol not extracted) | 5 | ||
| Delay to Output | TPD | 100 | ns | Guaranteed by design | 5 | ||
| Output Low Level | VOL | 1 | V | VCC =15V, Io=20mA; guaranteed by design | 5 | ||
| Rising Time | Tr | 200 | ns | VCC =15V CL=1000pF | 5 | ||
| Falling Time | Tf | 30 | ns | VCC =15V CL =1000pF | 5 | ||
| Voltage Stability | FSW_VS | 1 | % | VCC =9V~24V; guaranteed by design | 6 | ||
| Soft Start Time | TSS | 7 | ms | VCS_OFF from 0.2V to 0.5V; guaranteed by design | 6 | ||
| OLP Trip Level | VOLP | 2.8 | V | 6 | |||
| OLP delay time | TD_OLP | 88 | ms | After soft-start | 6 | ||
| CS OVP Trip Current Level | VCSOVP | 0.31 | V | 6 | |||
| CS OVP De-bounce Cycle | TD_CSOVP | 8 | Cycle | Guaranteed by design | 6 | ||
| OTP Turn-On Trip Level | VOTP_ON | 1.05 | V | 6 | |||
| OTP Turn-Off Trip Level | VOTP_OFF | 0.95 | V | 6 | |||
| OTP pin de-bounce time | TD_OTP | 550 | s | VCOMP > 2V; micro prefix missing in extracted text | 6 | ||
| OTP Level | TUP_OTP | 140 | C | Guaranteed by design | 6 | ||
| OTP Hysteresis | TINOTP_HYS | 15 | C | Guaranteed by design | 6 | ||
| SDSP CS Pin Level Secondary diode short | VCS_SDSP | 1.2 | V | 6 | |||
| De-bounce Cycle (SDSP) | TD_SDSP | 4 | Cycle | Guaranteed by design | 6 | ||
| Package Thermal Resistance (SOT-26) | JA | 200 | C/W | SOT-26 | 4 |
CAD (KiCad official)
- Symbol:
LD5535E1GL - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-26-6 (KiCad packages3D, STEP)
- 3D model files:
ld5535e1gl-etched.step/ld5535e1gl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ld5535e1gl.step/ld5535e1gl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leadtrend Tech datasheet (15 pp, sha256
6f4a0f6133abf60e, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LD5535E1GL
**Leadtrend Tech** · AC-DC Controllers And Regulators · SOT-26-6
LD5535E1GL from Leadtrend Tech, in a SOT-26-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the controller. |
| 2 | COMP | input | Voltage feedback pin (same as the COMP pin in UC384X) that connects to a photo-coupler to close the control loop and achieve regulation. |
| 3 | OTP | input | Pulling this pin below 0.95V latches the controller off until AC power is cycled; an NTC to ground gives over-temperature protection, and floating it or using a 100k resistor disables the latch protection. |
| 4 | CS | input | Current sense pin that senses the MOSFET current for peak-current and pulse-by-pulse limit; absolute maximum rating is -0.3V to 6V. |
| 5 | VCC | power_in | Supply voltage pin; recommended operating range is 8.5V to 26.5V with an absolute maximum of 30V. |
| 6 | OUT | output | Gate drive output that drives the external power MOSFET; absolute maximum range is -0.3V to VCC+0.3V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leadtrend Tech |
| Package | SOT-26-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Junction Temperature | TJ | -40 | | 125 | C | | 4 |
| Supply VCC Voltage | VCC | 8.5 | | 26.5 | V | | 4 |
| VCC Capacitor | | 3.3 | | 10 | F | Printed unit glyph is missing in extracted text; micro prefix not confirmed | 4 |
| Start-up resistor Value (AC Side, Half Wave) | | 540 | | 2.2 | K / M (as printed) | AC side, half wave; printed as 540K and 2.2M | 4 |
| COMP Pin Capacitor | | 1 | | 10 | nF | | 4 |
| CS Pin Capacitor Value | | 47 | | 390 | pF | | 4 |
| Supply Voltage VCC | VCC | -0.3 | | 30 | V | | 4 |
| COMP, CS, OTP pin voltage | COMP, CS, OTP | -0.3 | | 6 | V | | 4 |
| OUT pin voltage | OUT | -0.3 | | | V | Upper limit printed as VCC+0.3V | 4 |
| Maximum Junction Temperature | | | | 150 | C | | 4 |
| Storage Temperature Range | | -65 | | 150 | C | | 4 |
| Lead temperature (Soldering) | | | | 260 | C | Soldering, 10 sec | 4 |
| ESD Voltage Protection, Human Body Model | | | | 2.5 | kV | Human body model | 4 |
| ESD Voltage Protection, Machine Model | | | | 250 | V | Machine model | 4 |
| Power Dissipation (SOT-26) | | | | 200 | mW | Ambient Temperature = 85C | 4 |
| UVLO(OFF) | VCCOFF | 6.5 | 7.5 | 8.5 | V | OUT OFF | 5 |
| UVLO(ON) | VCCON | 15 | 16 | 17 | V | | 5 |
| VCC OVP Level | VCCOVP | 27 | 28 | 29 | V | | 5 |
| Maximum Input Voltage (VCS_MIN) | VCS_MIN | 0.59 | 0.69 | 0.79 | V | For High Line | 5 |
| Maximum Input Voltage (VCS_OFF) | VCS_LIMIT | | | 0.82 | V | | 5 |
| Output High Level | VOH | 9 | | 14 | V | VCC =15V, Io=20mA | 5 |
| Output High Clamp Level | VO_CLAMP | 10.5 | 11.5 | 12.5 | V | VCC =18V | 5 |
| CCM Frequency | FCCM | 60 | 65 | 70 | kHz | | 6 |
| Frequency Swapping | FSW_MOD | -8 | | 8 | % | Guaranteed by design | 6 |
| Green Mode Frequency | FSW_GREEN | 21 | 24 | 27 | kHz | | 6 |
| Temp. Stability | FSW_TS | | 3 | 5 | % | Guaranteed by design | 6 |
| Maximum Duty | DMAX | | | 81 | % | Guaranteed by design | 6 |
| OTP Pin Source Current | IOTP | 90 | 100 | 110 | A | Micro prefix missing in extracted text | 6 |
| Startup Current | ICC_ST | | 1 | | A | VCC < UVLO(ON); micro prefix missing in extracted text | 5 |
| Operating Current (with 1nF load on OUT Pin) | ICC_OP1 | | 0.285 | | mA | VCOMP=0V, OUT=1nF | 5 |
| Operating Current (with 1nF load on OUT Pin) | ICC_OP2 | | 1.9 | | mA | VCOMP=1.7V, OUT=1nF | 5 |
| Auto current protection | ICC_OPA1 | | 0.6 | | mA | | 5 |
| VCC OVP de-bounce time | TVCC_OVP | | 8 | | Cycle | | 5 |
| Short Circuit Current | ICOMP | | 0.11 | | mA | VCOMP=0V | 5 |
| Open Loop Voltage | VCOMP_OPEN | | 3.15 | | V | | 5 |
| Zero Duty Threshold VCOMP | VZDC | | 0.5 | | V | | 5 |
| Zero Duty Hysteresis | VZDCH | | 100 | | mV | | 5 |
| Leading Edge Blanking Time | TLEB | | 200 | | ns | | 5 |
| Internal Slope Compensation | VSLP_L | | 330 | | mV | 0% to DMAX. (Linearly increase); guaranteed by design | 5 |
| Input impedance | ZCS | | 1 | | M | Guaranteed by design; unit printed as M (Ohm symbol not extracted) | 5 |
| Delay to Output | TPD | | 100 | | ns | Guaranteed by design | 5 |
| Output Low Level | VOL | | 1 | | V | VCC =15V, Io=20mA; guaranteed by design | 5 |
| Rising Time | Tr | | 200 | | ns | VCC =15V CL=1000pF | 5 |
| Falling Time | Tf | | 30 | | ns | VCC =15V CL =1000pF | 5 |
| Voltage Stability | FSW_VS | | 1 | | % | VCC =9V~24V; guaranteed by design | 6 |
| Soft Start Time | TSS | | 7 | | ms | VCS_OFF from 0.2V to 0.5V; guaranteed by design | 6 |
| OLP Trip Level | VOLP | | 2.8 | | V | | 6 |
| OLP delay time | TD_OLP | | 88 | | ms | After soft-start | 6 |
| CS OVP Trip Current Level | VCSOVP | | 0.31 | | V | | 6 |
| CS OVP De-bounce Cycle | TD_CSOVP | | 8 | | Cycle | Guaranteed by design | 6 |
| OTP Turn-On Trip Level | VOTP_ON | | 1.05 | | V | | 6 |
| OTP Turn-Off Trip Level | VOTP_OFF | | 0.95 | | V | | 6 |
| OTP pin de-bounce time | TD_OTP | | 550 | | s | VCOMP > 2V; micro prefix missing in extracted text | 6 |
| OTP Level | TUP_OTP | | 140 | | C | Guaranteed by design | 6 |
| OTP Hysteresis | TINOTP_HYS | | 15 | | C | Guaranteed by design | 6 |
| SDSP CS Pin Level Secondary diode short | VCS_SDSP | | 1.2 | | V | | 6 |
| De-bounce Cycle (SDSP) | TD_SDSP | | 4 | | Cycle | Guaranteed by design | 6 |
| Package Thermal Resistance (SOT-26) | JA | | 200 | | C/W | SOT-26 | 4 |
## CAD (KiCad official)
- Symbol: `LD5535E1GL`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-26-6 (KiCad packages3D, STEP)
- 3D model files: `ld5535e1gl-etched.step` / `ld5535e1gl-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ld5535e1gl.step` / `ld5535e1gl.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Leadtrend Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590230620640350208) (15 pp, sha256 `6f4a0f6133abf60e`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ld5535e1gl-datasheet.pdf)