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LD501PCSOT-25

Public Made by Adom

by adom

analogysemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LD501PCSOT-25

analogysemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT23-5

LD501PCSOT-25 from analogysemi, in a SOT23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Regulator input supply operating from 2.2V to 5.5V; bypass VIN to GND with a 1μF or greater capacitor.
2 GND power_in Ground reference pin for the regulator.
3 EN input Enable input: drive EN high to turn the regulator on and low to turn it off; connect EN to VIN for automatic startup.
4 NC unconnected No connect; not connected internally.
5 VOUT power_out Regulated output voltage; bypass VOUT to GND with a 1μF or greater capacitor.

Key specifications

Parameter Value
Manufacturer analogysemi
Package SOT23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 2.2 5.5 V 7
Output Voltage Range VOUT 1.1 5 V 7
Output Current Range (LD501P) IOUT 0 250 mA LD501P 7
Output Capacitor COUT 0.7 1 µF 7
Output Capacitor ESR RESR 0.001 0.2 Ω 7
Junction Temperature TJ -40 125 °C 7
VIN to GND VIN -0.3 6.5 V 6
VOUT to GND VOUT -0.3 V maximum printed as VIN 6
EN to GND EN -0.3 6.5 V 6
Operating Temperature TA -40 125 °C 6
Junction Temperature TJ -40 125 °C 6
Storage Temperature Tstg -65 150 °C 6
ESD Human-Body Model V(ESD) -5000 5000 V HBM, per ANSI/ESDA/JEDEC JS-001 6
ESD Charged-Device Model V(ESD) -2000 2000 V CDM, per JEDEC JESD22-C101 6
Input Voltage Range VIN 2.2 5.5 V TJ = −40°C to 125°C 8
Output Voltage Accuracy (SOT23-5) VOUT -1 1 % IOUT = 10mA 8
Output Voltage Accuracy (SOT23-5) VOUT -2.5 1.5 % VOUT ≥1.8V, 100μA < IOUT < 150mA (200mA, 250mA), VIN = (VOUT + 0.4V) to 5.5V 8
Current-Limit Threshold (LD501P) ILIMIT 260 350 385 mA TJ = 0°C to 125°C, LD501P 9
Undervoltage Lockout Input Voltage Falling UVLOFALL 1.75 2 V TJ = −40°C to 125°C 9
Operating Supply Current IGND 12 μA IOUT = 0μA 8
Operating Supply Current IGND 25 μA IOUT = 0μA, TJ = −40°C to 125°C 8
Operating Supply Current IGND 28 μA IOUT = 100μA 8
Operating Supply Current IGND 54 μA IOUT = 100μA, TJ = −40°C to 125°C 8
Operating Supply Current IGND 61 μA IOUT = 10mA 8
Operating Supply Current IGND 100 μA IOUT = 10mA, TJ = −40°C to 125°C 8
Operating Supply Current IGND 229 μA IOUT = 250mA 8
Operating Supply Current IGND 291 μA IOUT = 250mA, TJ = −40°C to 125°C 8
Shutdown Current IGND-SD 0.25 μA EN = GND 8
Shutdown Current IGND-SD 1.8 μA EN = GND, TJ = −40°C to 125°C 8
Line Regulation ∆VOUT/∆VIN 0.02 %/V VIN = (VOUT + 0.4V) to 5.5V, TJ = −40°C to 125°C 8
Load Regulation (SOT23-5) ∆VOUT/∆IOUT 0.002 %/mA VOUT ≥ 1.8V, IOUT = 100μA to 150mA (200mA, 250mA) 8
Load Regulation (SOT23-5) ∆VOUT/∆IOUT 0.005 %/mA VOUT ≥ 1.8V, IOUT = 100μA to 150mA (200mA, 250mA), TJ = −40°C to 125°C 8
Dropout Voltage (SOT23-5) VDROPOUT 118 mV IOUT = 250mA 9
Dropout Voltage (SOT23-5) VDROPOUT 117 mV IOUT = 250mA, TJ = −40°C to 125°C 9
Undervoltage Lockout Input Voltage Rising UVLORISE 2.1 V TJ = −40°C to 125°C 9
Undervoltage Lockout Hysteresis UVLOHYS 102 mV TJ = −40°C to 125°C 9
Thermal Shutdown Threshold TSSD 155 °C TJ rising 9
Thermal Shutdown Hysteresis TSSD-HYS 20 °C TJ rising 9
EN Input Logic High VIH 1.2 V 2.2V ≤ VIN ≤ 5.5V 9
EN Input Logic Low VIL 0.4 V 2.2V ≤ VIN ≤ 5.5V 9
EN Input Leakage Current IEN 0.001 μA VIN = VEN = 5.5V 9
Output Noise OUTNOISE 12.5 μV rms 10Hz to 100kHz, VIN = 5V, VOUT = 2.5V 9
Thermal Resistance Junction-to-Ambient RθJA 168 °C/W SOT23-5 7
Thermal Resistance Junction-to-Case (Top) RθJC(top) 103 °C/W SOT23-5 7
Thermal Resistance Junction-to-Board RθJB 39 °C/W SOT23-5 7
Junction-to-Top Characterization Parameter ψJT 10 °C/W SOT23-5 7
Junction-to-Board Characterization Parameter ψJB 36 °C/W SOT23-5 7
Thermal Resistance Junction-to-Case (Bottom) RθJC(bot) 66 °C/W SOT23-5 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper to solder the package GND pins to the PCB. Table 9 shows typical θJA values of the SOT23-5 for various PCB copper sizes. Table 10 shows the typical ΨJB 19

CAD (KiCad official)

  • Symbol: LD501PCSOT-25
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT23-5 (KiCad packages3D, STEP)
  • 3D model files: ld501pcsot-25-etched.step / ld501pcsot-25-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ld501pcsot-25.step / ld501pcsot-25.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: analogysemi datasheet (24 pp, sha256 6b45c64f53dc3063, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF