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docs ld1117d33ctr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
ld1117d33ctr-etched.fit.json ld1117d33ctr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ld1117d33ctr-etched.glb ld1117d33ctr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ld1117d33ctr-etched.step ld1117d33ctr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ld1117d33ctr-hero.glb Publish 0.2.1 · Ray
ld1117d33ctr-hero.overlay.json Publish 0.2.1 · Ray
ld1117d33ctr.glb Publish 0.1.0 · Ray
ld1117d33ctr.kicad_mod Publish 0.1.0 · Ray
ld1117d33ctr.kicad_sym symbol: give the SO-8 its real 8-pin pinout. The page shipped the 3-pin DPAK/TO-220 pinout (GND/VOUT/VIN) on an 8-pad S… · Ray
ld1117d33ctr.lbr symbol: give the SO-8 its real 8-pin pinout. The page shipped the 3-pin DPAK/TO-220 pinout (GND/VOUT/VIN) on an 8-pad S… · Ray
ld1117d33ctr.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json symbol: give the SO-8 its real 8-pin pinout. The page shipped the 3-pin DPAK/TO-220 pinout (GND/VOUT/VIN) on an 8-pad S… · Ray
page.json Publish 0.2.1 · Ray
README.md ld1117d33ctr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

LD1117D33CTR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

LD1117D33CTR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / common return pin. Reference for the internal band-gap and the 3.3 V output. Quiescent current returns through this pin.
2 VOUT power_out Regulated 3.3 V output (typ. 3.3 V, tolerance +/-1% at 25 degC). Sources up to 800 mA continuous; requires a 10 uF minimum output capacitor for loop stability. Electrically common with the DPAK tab.
3 VIN power_in Unregulated DC input supply. Operating range up to 15 V (18 V absolute max when IOUT < 20 mA); a 100 nF input decoupling capacitor is recommended. Dropout is typically 1.1 V at 800 mA load.
TAB VOUT power_out Exposed metal tab used as the primary thermal path to the PCB copper pour. Electrically tied to VOUT internally, so any copper it contacts is at the regulated output potential.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8
Category PMIC
Pins 4

Ordering variants

Same part, different packaging or reel option.

  • LD1117D33CTR
  • LD1117DT33CTR
  • LD1117S33CTR
  • LD1117S33TR
  • LD1117S8-33TR
  • LD1117V33

CAD (KiCad official)

  • Symbol: LD1117D33CTR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ld1117d33ctr-etched.step / ld1117d33ctr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ld1117d33ctr.step / ld1117d33ctr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ld1117d33ctr.step 122 KB You want the bare part, or you mark your own boards.
ld1117d33ctr-etched.step 2.1 MB You want the part with LD1117D33CTR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 532 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (44 pp, sha256 1b80923ec6ca9161, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF