# LC0542T5

**Leiditech** · ESD And Surge Protection (TVS/ESD) · SOT-553

LC0542T5 from Leiditech, in a SOT-553. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vcc | power_in | Supply line protected by the TVS array, with reverse working peak voltage VRWM of 5V max. |
| 2 | N.C. | unconnected | No connection. |
| 3 | I/O | passive | Protected I/O line (e.g. USB D- or D+) with 0.7pF typical capacitance and 72W peak pulse power (8/20µs). |
| 4 | GND | power_in | Ground reference for the TVS diode array. |
| 5 | I/O | passive | Protected I/O line (e.g. USB D+ or D-) with 0.7pF typical capacitance and 72W peak pulse power (8/20µs). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOT-553 |
| Category | Circuit Protection |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Power (8/20µs) | Ppp |  |  | 72 | W |  | 1 |
| ESD per IEC 61000-4-2 (Air) | VESD | -17 |  | 17 | KV | per IEC 61000-4-2 (Air) | 1 |
| ESD per IEC 61000-4-2 (Contact) | VESD | -14 |  | 14 | KV | per IEC 61000-4-2 (Contact) | 1 |
| Operating Temperature Range | TJ | -40 |  | 125 | ℃ |  | 1 |
| Storage Temperature Range | TSTJ | -55 |  | 150 | ℃ |  | 1 |
| Reverse Working Peak Voltage | VRWM |  |  | 5 | V |  | 2 |
| Reverse Breakdown Voltage | VBR | 6 |  |  | V | IT = 1mA | 2 |
| Reverse Leakage Current | IR |  |  | 1 | µA | VRWM = 5V | 2 |
| Clamping Voltage | VC |  | 9.8 |  | V | IPP = 1 A (8/20µs) | 2 |
| Clamping Voltage | VC |  | 18 |  | V | IPP = 4 A (8/20µs) | 2 |
| Capacitance | CJ |  | 0.7 |  | pF | VR = 0V, f = 1MHz | 2 |

## CAD (KiCad official)

- Symbol: `LC0542T5`
- Footprint: `Package_TO_SOT_SMD:SOT-553`
- 3D model: SOT-553 (KiCad packages3D, STEP)
- 3D model files: `lc0542t5-etched.step` / `lc0542t5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lc0542t5.step` / `lc0542t5.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Leiditech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603031125518938112) (4 pp, sha256 `5906ba906c367d34`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lc0542t5-datasheet.pdf)