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Contents

README

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LBTP180Y3T1G

LRC · Bipolar (BJT) · SOT-89

LBTP180Y3T1G from LRC, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Base of the PNP transistor; VEBO max -5 V and peak base current IBM max -200 mA.
2 C passive Collector of the PNP transistor; VCEO -80 V, VCBO -100 V, IC -1 A DC and ICM -1.5 A peak maximum.
3 E passive Emitter of the PNP transistor, shown with the arrow pointing into the device in the symbol; VEBO max -5 V.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-89
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: LBTP180Y3T1G
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: lbtp180y3t1g-etched.step / lbtp180y3t1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lbtp180y3t1g.step / lbtp180y3t1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (6 pp, sha256 63b06db310d79d16, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF