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Ray Publish 0.1.0 3bc9216 28d ago

LBSS84LT1G

LRC · MOSFETs · SOT-23

LBSS84LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the P-channel MOSFET; gate-to-source voltage is rated ±20 Vdc continuous, with VGS(th) of 0.8 V min to 2.0 V max at ID = 250 µAdc.
2 Source passive Source terminal of the P-channel MOSFET; the body diode conducts continuous source current up to 0.130 A (0.520 A pulsed).
3 Drain passive Drain terminal of the P-channel MOSFET; drain-to-source voltage is rated 50 Vdc and continuous drain current 130 mA (520 mA pulsed, tp ≤ 10 µs).

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: LBSS84LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lbss84lt1g-etched.step / lbss84lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lbss84lt1g.step / lbss84lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (4 pp, sha256 4a0cddadbea0bf5e, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF