# LBSS138WT1G

**LRC** · MOSFETs · SC-70

LBSS138WT1G from LRC, in a SC-70. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal; gate-to-source voltage is rated ±20 V continuous with a threshold VGS(th) of 0.5 V to 1.5 V at VDS = VGS, ID = 1.0 mA. |
| 2 | Source | passive | Source terminal of the N-channel MOSFET; drain current is rated 200 mA continuous and 800 mA pulsed (tp ≤ 10 µs). |
| 3 | Drain | passive | Drain terminal of the N-channel MOSFET; drain-source voltage is rated 50 V maximum. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SC-70 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS |  |  | 50 | Vdc |  | 1 |
| Gate-to-Source Voltage, Continuous | VGS | -20 |  | 20 | Vdc |  | 1 |
| Drain Current, Continuous | ID |  |  | 200 | mAdc | TA = 25°C | 1 |
| Drain Current, Pulsed | IDM |  |  | 800 | mAdc | tp ≤ 10 μs | 1 |
| Total Device Dissipation, FR-5 Board | PD |  |  | 150 | mW | FR-5 board (Note 1) @ TA = 25°C | 1 |
| Derate above 25°C | PD |  | 1.8 |  | mW/°C |  | 1 |
| Thermal Resistance, Junction-to-Ambient | RθJA |  | 556 |  | °C/W | FR-5 board (Note 1) | 1 |
| Junction and Storage Temperature | TJ,Tstg | -55 |  | 150 | °C |  | 1 |
| Maximum Lead Temperature for Soldering Purposes | TL |  |  | 260 | °C | 10 seconds | 1 |
| Drain-Source Breakdown Voltage | VBRDSS | 50 |  |  | Vdc | VGS = 0, ID = 250 μAdc | 2 |
| Gate-Body Leakage Current, Forward | IGSSF |  |  | 0.1 | μAdc | VGS = 20 Vdc | 2 |
| Gate-Body Leakage Current, Reverse | IGSSR |  |  | -0.1 | μAdc | VGS = -20 Vdc | 2 |
| Gate Threshold Voltage | VGS(th) | 0.5 |  | 1.5 | Vdc | VDS = VGS, ID = 1.0 mAdc | 2 |
| Static Drain-Source On-State Resistance | RDS(on) |  | 5.6 | 10 | Ohms | VGS = 2.75 Vdc, ID < 200 mAdc | 2 |
| Static Drain-Source On-State Resistance | RDS(on) |  |  | 3.5 | Ohms | VGS = 5.0 Vdc, ID = 200 mAdc | 2 |
| Forward Transconductance | gfs | 100 |  |  | mS | VDS = 25 Vdc, ID = 200 mAdc, f = 1.0 kHz | 2 |
| Input Capacitance | Ciss |  | 40 | 50 | pF | VDS = 25 Vdc, VGS = 0, f = 1.0 MHz | 2 |
| Output Capacitance | Coss |  | 12 | 25 | pF | VDS = 25 Vdc, VGS = 0, f = 1.0 MHz | 2 |
| Reverse Transfer Capacitance | Crss |  | 3.5 | 5 | pF | VDS = 25 Vdc, VGS = 0, f = 1.0 MHz | 2 |
| Turn-On Delay Time | td(on) |  |  | 20 | ns | VDD = 30 Vdc, ID = 200 mAdc | 2 |
| Turn-Off Delay Time | td(off) |  |  | 20 | ns | VDD = 30 Vdc, ID = 200 mAdc | 2 |

## CAD (KiCad official)

- Symbol: `LBSS138WT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-323_SC-70`
- 3D model: SC-70 (KiCad packages3D, STEP)
- 3D model files: `lbss138wt1g-etched.step` / `lbss138wt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lbss138wt1g.step` / `lbss138wt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588903945565843456) (6 pp, sha256 `592c3a07b7472ad4`, retrieved 2026-11-06, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lbss138wt1g-datasheet.pdf)