component
LBC850CLT1G
Public Made by Adomby adom
LRC Bipolar (BJT), SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLBC850CLT1G
LRC · Bipolar (BJT) · SOT-23
LBC850CLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BASE | passive | Base terminal of the NPN general-purpose transistor; emitter-base voltage is rated at 6 V (VEBO) and collector current at 100 mA continuous. |
| 2 | EMITTER | passive | Emitter terminal of the NPN transistor; the datasheet rates emitter-base voltage at 6 V (VEBO) and continuous collector current at 100 mA. |
| 3 | COLLECTOR | passive | Collector terminal of the NPN transistor; rated for 45 V collector-emitter (VCEO), 50 V collector-base (VCBO) and 100 mA continuous collector current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector–Emitter Breakdown Voltage | VBR(CEO) | 45 | V | IC = 10 mA | 2 | ||
| Collector–Emitter Breakdown Voltage | VBR(CES) | 50 | V | IC = 10 µA, VEB = 0 | 2 | ||
| Collector–Base Breakdown Voltage | VBR(CBO) | 50 | V | IC = 10 µA | 2 | ||
| Emitter–Base Breakdown Voltage | VBR(EBO) | 6 | V | IE = 1.0 µA | 2 | ||
| Collector Cutoff Current | ICBO | 15 | nA | VCB = 30 V | 2 | ||
| Collector Cutoff Current | ICBO | 5 | µA | VCB = 30 V, TA = 150°C | 2 | ||
| DC Current Gain | HFE | 420 | 520 | 800 | IC = 2.0 mA, VCE = 5.0 V | 2 | |
| Collector–Emitter Saturation Voltage | VCE(sat) | 0.25 | V | IC = 10 mA, IB = 0.5 mA | 2 | ||
| Collector–Emitter Saturation Voltage | VCE(sat) | 0.6 | V | IC = 100 mA, IB = 5.0 mA | 2 | ||
| Base–Emitter Voltage | VBE(on) | 580 | 660 | 700 | mV | IC = 2.0 mA, VCE = 5.0 V | 2 |
| Base–Emitter Voltage | VBE(on) | 770 | mV | IC = 10 mA, VCE = 5.0 V | 2 | ||
| Current–Gain — Bandwidth Product | fT | 100 | MHz | IC = 10 mA, VCE = 5.0 V, f = 100 MHz | 2 | ||
| Output Capacitance | Cobo | 4.5 | pF | VCB = 10 V, f = 1.0 MHz | 2 | ||
| Noise Figure | NF | 4 | dB | IC = 0.2 mA, VCE = 5.0 V, RS = 2.0 kΩ, f = 1.0 kHz, BW = 200 Hz | 2 | ||
| Collector–Emitter Voltage | VCEO | 45 | V | 1 | |||
| Collector–Base Voltage | VCBO | 50 | V | 1 | |||
| Emitter–Base Voltage | VEBO | 6 | V | 1 | |||
| Collector Current — Continuous | IC | 100 | mA | 1 | |||
| Total Device Dissipation, FR-5 Board | PD | 225 | mW | FR-5 board (Note 1) @ TA = 25ºC | 1 | ||
| Total Device Dissipation, Alumina Substrate | PD | 300 | mW | Alumina substrate (Note 2) @ TA = 25ºC | 1 | ||
| Derate above 25ºC, FR-5 Board | 1.8 | mW/ºC | FR-5 board (Note 1), derate above 25ºC | 1 | |||
| Derate above 25ºC, Alumina Substrate | 2.4 | mW/ºC | Alumina substrate (Note 2), derate above 25ºC | 1 | |||
| Thermal Resistance, Junction–to–Ambient, FR-5 Board | RΘJA | 556 | ºC/W | FR-5 board (Note 1) | 1 | ||
| Thermal Resistance, Junction–to–Ambient, Alumina Substrate | RΘJA | 417 | ºC/W | Alumina substrate (Note 2) | 1 | ||
| Junction and Storage Temperature | TJ,Tstg | -55 | 150 | ºC | 1 |
CAD (KiCad official)
- Symbol:
LBC850CLT1G - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
lbc850clt1g-etched.step/lbc850clt1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lbc850clt1g.step/lbc850clt1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LRC datasheet (6 pp, sha256
cb0a45599596a26b, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).