LAN9253-I

{
  "slug": "lan9253-i",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Interface - Specialized, QFN-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "interface",
    "lan9253-i",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lan9253-i.kicad_sym",
    "lan9253-i.kicad_mod",
    "lan9253-i.glb",
    "lan9253-i.step",
    "lan9253-i.lbr",
    "docs/hero.png",
    "docs/lan9253-i-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lan9253-i-hero.glb",
    "lan9253-i-hero.overlay.json",
    "lan9253-i-etched.glb"
  ],
  "component": {
    "mpn": "LAN9253-I",
    "manufacturer": "Microchip Tech",
    "package": "QFN-64(9x9)",
    "pin_count": 65,
    "category": "Interface",
    "subcategory": "Interface - Specialized",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603559276329910272",
    "parts": {
      "symbol": "lan9253-i.kicad_sym",
      "footprint": "lan9253-i.kicad_mod",
      "model_3d": "lan9253-i-hero.glb",
      "model_3d_plain": "lan9253-i-etched.glb",
      "model_3d_step": "lan9253-i-etched.step",
      "model_3d_step_plain": "lan9253-i.step",
      "lbr": "lan9253-i.lbr"
    },
    "distributor_links": {
      "lcsc": "C5745149"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T12:26:54Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "OSCI",
        "type": "input",
        "description": "External 25 MHz crystal input, which may also be overdriven by a single-ended clock oscillator (leave OSCO unconnected in that case)."
      },
      {
        "number": "2",
        "name": "OSCO",
        "type": "output",
        "description": "External 25 MHz crystal output; left unconnected when OSCI is overdriven by a clock source."
      },
      {
        "number": "3",
        "name": "OSCVDD12",
        "type": "power_in",
        "description": "+1.2 V crystal oscillator supply, provided by the on-chip regulator unless regulator-off mode is selected via REG_EN."
      },
      {
        "number": "4",
        "name": "OSCVSS",
        "type": "power_in",
        "description": "Crystal oscillator ground, separate from the common VSS pin."
      },
      {
        "number": "5",
        "name": "VDD33",
        "type": "power_in",
        "description": "+3.3 V supply for the internal regulators; must be supplied even when the internal regulators are disabled."
      },
      {
        "number": "6",
        "name": "VDDCR",
        "type": "power_in",
        "description": "+1.2 V digital core supply from the on-chip regulator (or external supply in regulator-off mode); decouple with 1 µF and 470 pF in parallel to ground."
      },
      {
        "number": "7",
        "name": "REG_EN",
        "type": "input",
        "description": "Regulator enable; when tied to 3.3 V the internal 1.2 V regulators are enabled."
      },
      {
        "number": "8",
        "name": "CLK_25/CLK_25_EN/XTAL_MODE",
        "type": "bidirectional",
        "description": "25 MHz crystal clock output (O8); CLK_25_EN strap (below 0.8 V disables output, 1.5 V enables it, above 2.2 V selects Schmitt-trigger OSCI input) and XTAL_MODE strap configure it."
      },
      {
        "number": "9",
        "name": "ERRLED/PME/100FD_B/LEDPOL4",
        "type": "bidirectional",
        "description": "ERR LED output (OD12/OS12, VDD33 domain) whose polarity is set by the LEDPOL4 strap; the pin also carries the 100FD_B strap and an optional PME output."
      },
      {
        "number": "10",
        "name": "WAIT_ACK/PME/LATCH0/EE_EMUL_SPI3",
        "type": "bidirectional",
        "description": "Host bus wait/acknowledge output (VO8/VOD8), tri-stated when the device is not selected and active low to indicate wait in push-pull mode."
      },
      {
        "number": "11",
        "name": "RST#",
        "type": "bidirectional",
        "description": "Active-low system reset: an input (VIS/VOD8, pull-up) that may be left unconnected because of the internal POR, and driven low during POR or EtherCAT reset."
      },
      {
        "number": "12",
        "name": "D2/AD2/SOF/SIO2/EE_EMUL_SPI0",
        "type": "bidirectional",
        "description": "Host bus data bit 2 in non-multiplexed modes (AD2 in multiplexed modes); mapped to the SOF output in Digital I/O mode and SIO2 in SPI mode."
      },
      {
        "number": "13",
        "name": "D1/AD1/EOF/SO/SIO1",
        "type": "bidirectional",
        "description": "Host bus data bit 1 (AD1 in multiplexed modes); mapped to the EOF output in Digital I/O mode and to SO/SIO1 in SPI mode."
      },
      {
        "number": "14",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "15",
        "name": "D14/AD14/DIGIO8/GPI8/GPO8/MII_TXD3/TX_SHIFT1",
        "type": "bidirectional",
        "description": "Host bus data bit 14 (AD14 multiplexed); mapped to DIGIO8/GPIO8 and to MII_TXD3 with the TX_SHIFT1 strap in other modes."
      },
      {
        "number": "16",
        "name": "D13/AD13/DIGIO7/GPI7/GPO7/MII_TXD2/TX_SHIFT0",
        "type": "bidirectional",
        "description": "Host bus data bit 13 (AD13 multiplexed); mapped to DIGIO7/GPIO7 and to MII_TXD2 with the TX_SHIFT0 strap in other modes."
      },
      {
        "number": "17",
        "name": "D0/AD0/WD_STATE/SI/SIO0",
        "type": "bidirectional",
        "description": "Host bus data bit 0 (AD0 multiplexed); mapped to SI/SIO0 in SPI modes and to the WD_STATE watchdog state output in Digital I/O mode."
      },
      {
        "number": "18",
        "name": "SYNC1/LATCH1/PME",
        "type": "bidirectional",
        "description": "EtherCAT SYNC1 output (VO8/VOD8/VOS8) or LATCH1 input (VIS); the SYNC1 output is not driven until the EEPROM is loaded."
      },
      {
        "number": "19",
        "name": "D9/AD9/LATCH_IN/SCK",
        "type": "bidirectional",
        "description": "Host bus data bit 9 (AD9 multiplexed); mapped to the SCK SPI clock input in SPI modes and to the LATCH_IN external data latch input in Digital I/O mode."
      },
      {
        "number": "20",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "21",
        "name": "D12/AD12/DIGIO6/GPI6/GPO6/MII_TXD1/100FD_B",
        "type": "bidirectional",
        "description": "Host bus data bit 12 (AD12 multiplexed); mapped to DIGIO6/GPIO6 and MII_TXD1 (with the 100FD_B strap) in other modes."
      },
      {
        "number": "22",
        "name": "D11/AD11/DIGIO5/GPI5/GPO5/MII_TXD0/100FD_A",
        "type": "bidirectional",
        "description": "Host bus data bit 11 (AD11 multiplexed); mapped to DIGIO5/GPIO5 and MII_TXD0 (with the 100FD_A strap) in other modes."
      },
      {
        "number": "23",
        "name": "D10/AD10/DIGIO4/GPI4/GPO4/MII_TXEN",
        "type": "bidirectional",
        "description": "Host bus data bit 10 (AD10 multiplexed); mapped to DIGIO4/GPIO4 and to the MII_TXEN transmit enable output in other modes."
      },
      {
        "number": "24",
        "name": "VDDCR",
        "type": "power_in",
        "description": "+1.2 V digital core supply from the on-chip regulator or an external source."
      },
      {
        "number": "25",
        "name": "A1/ALELO/OE_EXT/MII_CLK25/EE_EMUL_SPI2",
        "type": "bidirectional",
        "description": "Host bus address bit 1 (indexed mode) or ALELO address latch (multiplexed mode); OE_EXT output-enable input (low clears outputs) in Digital I/O mode and the MII_CLK25 25 MHz clock output in SPI with MII mode."
      },
      {
        "number": "26",
        "name": "A3/BE0/DIGIO11/GPI11/GPO11/MII_RXDV",
        "type": "bidirectional",
        "description": "Host bus address bit 3 (indexed mode) or byte enable BE0 (multiplexed mode, active low); mapped to DIGIO11/GPIO11 and MII_RXDV in other modes."
      },
      {
        "number": "27",
        "name": "A4/BE1/DIGIO12/GPI12/GPO12/MII_RXD0",
        "type": "bidirectional",
        "description": "Host bus address bit 4 (indexed mode) or byte enable BE1 (multiplexed mode, active low); mapped to DIGIO12/GPIO12 and MII_RXD0 in other modes."
      },
      {
        "number": "28",
        "name": "CS/DIGIO13/GPI13/GPO13/MII_RXD1",
        "type": "bidirectional",
        "description": "Host bus chip select input, normally active low (polarity configurable); mapped to DIGIO13/GPIO13 and MII_RXD1 in other modes."
      },
      {
        "number": "29",
        "name": "A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/EE_EMUL_ALELO_POL/MII_LINKPOL/LEDPOL2",
        "type": "bidirectional",
        "description": "Host bus address bit 2 (indexed mode) or ALEHI address latch enable high (multiplexed mode); mapped to DIGIO10/GPIO10 and LINKACTLED2 in other modes."
      },
      {
        "number": "30",
        "name": "WR/ENB/DIGIO14/GPI14/GPO14/MII_RXD2",
        "type": "bidirectional",
        "description": "Host bus write strobe WR (normally active low) and ENB data-enable strobe; mapped to DIGIO14/GPIO14 and MII_RXD2 in other modes."
      },
      {
        "number": "31",
        "name": "RD/RD_WR/DIGIO15/GPI15/GPO15/MII_RXD3",
        "type": "bidirectional",
        "description": "Host bus read strobe RD (normally active low) or RD_WR direction control depending on bus mode; mapped to DIGIO15/GPIO15 and MII_RXD3 in other modes."
      },
      {
        "number": "32",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "33",
        "name": "A0/D15/AD15/DIGIO9/GPI9/GPO9/MII_RXER",
        "type": "bidirectional",
        "description": "Host bus address bit 0 (indexed mode, shared with data bit 15); mapped to DIGIO9/GPIO9 and MII_RXER in other modes."
      },
      {
        "number": "34",
        "name": "SYNC0/LATCH0/PME",
        "type": "bidirectional",
        "description": "EtherCAT SYNC0 output (VO8/VOD8/VOS8) or LATCH0 input (VIS); the SYNC0 output is not driven until the EEPROM is loaded."
      },
      {
        "number": "35",
        "name": "D3/AD3/WD_TRIG/SIO3/EE_EMUL_SPI1",
        "type": "bidirectional",
        "description": "Host bus data bit 3 (AD3 multiplexed); mapped to the WD_TRIG SyncManager watchdog trigger output in Digital I/O mode and SIO3 in SPI mode."
      },
      {
        "number": "36",
        "name": "D6/AD6/DIGIO0/GPI0/GPO0/MII_RXCLK",
        "type": "bidirectional",
        "description": "Host bus data bit 6 (AD6 multiplexed); mapped to DIGIO0/GPIO0 and MII_RXCLK receive clock input in other modes."
      },
      {
        "number": "37",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "38",
        "name": "VDDCR",
        "type": "power_in",
        "description": "+1.2 V digital core supply from the on-chip regulator or an external source."
      },
      {
        "number": "39",
        "name": "D7/AD7/DIGIO1/GPI1/GPO1/MII_MDC",
        "type": "bidirectional",
        "description": "Host bus data bit 7 (AD7 multiplexed); mapped to DIGIO1/GPIO1 and the MII_MDC SMI clock output in other modes."
      },
      {
        "number": "40",
        "name": "D8/AD8/DIGIO2/GPI2/GPO2/MII_MDIO",
        "type": "bidirectional",
        "description": "Host bus data bit 8 (AD8 multiplexed); mapped to DIGIO2/GPIO2 and the MII_MDIO SMI data pin in other modes, which requires an external pull-up."
      },
      {
        "number": "41",
        "name": "TESTMODE",
        "type": "input",
        "description": "Test mode select; this pin must be tied to VSS for proper operation."
      },
      {
        "number": "42",
        "name": "EESDA/TMS/EE_EMUL1",
        "type": "bidirectional",
        "description": "EEPROM I2C serial data (VIS/VOD8); must always be pulled up by an external resistor, and also serves as JTAG TMS and the EE_EMUL1 strap."
      },
      {
        "number": "43",
        "name": "EESCL/TCK/EE_EMUL2",
        "type": "bidirectional",
        "description": "EEPROM I2C serial clock (VIS/VOD8); must be pulled up externally whenever an EEPROM is used, and also serves as JTAG TCK and the EE_EMUL2 strap."
      },
      {
        "number": "44",
        "name": "IRQ/LATCH1",
        "type": "bidirectional",
        "description": "Interrupt request output (VO8/VOD8) with programmable polarity, source and buffer type; LATCH1 input when the pin is mapped to the latch function."
      },
      {
        "number": "45",
        "name": "RUNLED/STATE_RUNLED/E2PSIZE/EE_EMUL0/LEDPOL3",
        "type": "bidirectional",
        "description": "RUN LED output (VOD12/VOS12) controlled by the AL Status Register; open-drain/open-source type and polarity are set by strap at reset, and the pin also carries the E2PSIZE strap."
      },
      {
        "number": "46",
        "name": "LINKACTLED1/TDI/CHIP_MODE1/LEDPOL1",
        "type": "bidirectional",
        "description": "Link/activity LED output for port 1 (VOD12/VOS12); also the JTAG TDI input and the CHIP_MODE1 strap."
      },
      {
        "number": "47",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+1.8 V to +3.3 V variable I/O power supply."
      },
      {
        "number": "48",
        "name": "LINKACTLED0/TDO/CHIP_MODE0/100FD_A/LEDPOL0",
        "type": "bidirectional",
        "description": "Link/activity LED output for port 0 (VOD12/VOS12); also the JTAG TDO output and the CHIP_MODE0 and 100FD_A straps."
      },
      {
        "number": "49",
        "name": "D4/AD4/DIGIO3/GPI3/GPO3/MII_LINK",
        "type": "bidirectional",
        "description": "Host bus data bit 4 (AD4 multiplexed); mapped to DIGIO3/GPIO3 and MII_LINK link status input in other modes."
      },
      {
        "number": "50",
        "name": "D5/AD5/OUTVALID/SCS#",
        "type": "bidirectional",
        "description": "Host bus data bit 5 (AD5 multiplexed); mapped to the OUTVALID output in Digital I/O mode and to the active-low SCS# SPI chip select input in SPI mode."
      },
      {
        "number": "51",
        "name": "VDD33TXRX1",
        "type": "power_in",
        "description": "+3.3 V analog power supply for Ethernet PHY A (see Note 3-3)."
      },
      {
        "number": "52",
        "name": "TXNA",
        "type": "bidirectional",
        "description": "Port A twisted-pair transmit/receive negative, channel 1 (AIO), connected to EtherCAT port 0 or 2."
      },
      {
        "number": "53",
        "name": "TXPA",
        "type": "bidirectional",
        "description": "Port A twisted-pair transmit/receive positive, channel 1 (AIO), connected to EtherCAT port 0 or 2."
      },
      {
        "number": "54",
        "name": "RXNA",
        "type": "bidirectional",
        "description": "Port A twisted-pair transmit/receive negative, channel 2 (AIO), connected to EtherCAT port 0 or 2."
      },
      {
        "number": "55",
        "name": "RXPA",
        "type": "bidirectional",
        "description": "Port A twisted-pair transmit/receive positive, channel 2 (AIO), connected to EtherCAT port 0 or 2."
      },
      {
        "number": "56",
        "name": "VDD12TX1",
        "type": "power_in",
        "description": "+1.2 V Port A transmitter supply; must be tied to VDD12TX2 (pin 59) for proper operation."
      },
      {
        "number": "57",
        "name": "RBIAS",
        "type": "input",
        "description": "Bias reference for internal circuits; connect to an external 12.1 kΩ, 1% resistor to ground."
      },
      {
        "number": "58",
        "name": "VDD33BIAS",
        "type": "power_in",
        "description": "+3.3 V bias power supply (see Note 3-3)."
      },
      {
        "number": "59",
        "name": "VDD12TX2",
        "type": "power_in",
        "description": "+1.2 V Port B transmitter supply; must be tied to VDD12TX1 (pin 56) for proper operation."
      },
      {
        "number": "60",
        "name": "RXPB",
        "type": "bidirectional",
        "description": "Port B twisted-pair transmit/receive positive, channel 2 (AIO), connected to EtherCAT port 1."
      },
      {
        "number": "61",
        "name": "RXNB",
        "type": "bidirectional",
        "description": "Port B twisted-pair transmit/receive negative, channel 2 (AIO), connected to EtherCAT port 1."
      },
      {
        "number": "62",
        "name": "TXPB",
        "type": "bidirectional",
        "description": "Port B twisted-pair transmit/receive positive, channel 1 (AIO), connected to EtherCAT port 1."
      },
      {
        "number": "63",
        "name": "TXNB",
        "type": "bidirectional",
        "description": "Port B twisted-pair transmit/receive negative, channel 1 (AIO), connected to EtherCAT port 1."
      },
      {
        "number": "64",
        "name": "VDD33TXRX2",
        "type": "power_in",
        "description": "+3.3 V analog power supply for Ethernet PHY B (see Note 3-3)."
      },
      {
        "number": "65",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The package hint says QFN-64 (9x9), but the extracted text only says '64-QFN' / '64-pin QFN' and giv; The ordering code LAN9253-I and the product identification system (p.400) are not in the excerpt, so; The exposed pad has no pin number in the datasheet, so it is listed as 'Exposed Pad' rather than a n",
          "exposed pad 65 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint",
          "37/65 pins cited to the wrong page (name found elsewhere): ['4:OSCVSS@p34', '7:REG_EN@p33', '12:D2/AD2/SOF/SIO2/EE_EMUL_SPI0@p21', '13:D1/AD1/EOF/SO/SIO1@p21']"
        ],
        "pages_sent": 54,
        "cost_usd": 0.2838,
        "at": "2026-10-17T12:25:16"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603559276329910272",
        "pages": 402,
        "sha256": "45410c2675e5e050",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "lan9253-i.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          0.75
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lan9253-i-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "93df4ee31a59ea5ff3539da6957065ede926dfb563b97da7cd2fbfc3b1dfb90b",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}