LAN9221I-ABZJ

{
  "slug": "lan9221i-abzj",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Interface - Specialized, QFN-56-EP(8x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "lan9221i-abzj",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
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    "README.md",
    "lan9221i-abzj.kicad_sym",
    "lan9221i-abzj.kicad_mod",
    "lan9221i-abzj.glb",
    "lan9221i-abzj.step",
    "lan9221i-abzj.lbr",
    "docs/hero.png",
    "docs/lan9221i-abzj-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lan9221i-abzj-hero.glb",
    "lan9221i-abzj-hero.overlay.json",
    "lan9221i-abzj-etched.glb"
  ],
  "component": {
    "mpn": "LAN9221I-ABZJ",
    "manufacturer": "Microchip Tech",
    "package": "QFN-56-EP(8x8)",
    "pin_count": 57,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Interface - Specialized",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/c1f68427dedfc2154226a824a897a27c.pdf",
    "parts": {
      "symbol": "lan9221i-abzj.kicad_sym",
      "footprint": "lan9221i-abzj.kicad_mod",
      "model_3d": "lan9221i-abzj-hero.glb",
      "model_3d_plain": "lan9221i-abzj-etched.glb",
      "model_3d_step": "lan9221i-abzj-etched.step",
      "model_3d_step_plain": "lan9221i-abzj.step",
      "lbr": "lan9221i-abzj.lbr"
    },
    "distributor_links": {
      "lcsc": "C478092",
      "digikey": "LAN9221I-ABZJ-ND",
      "mouser": "886-LAN9221I-ABZJ"
    },
    "distributor_check": {
      "checked_at": "2026-10-30T16:37:21Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "LAN9221I-ABZJ-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "886-LAN9221I-ABZJ",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD33REG",
        "type": "power_in",
        "description": "+3.3V power supply for the internal +1.8V core regulator."
      },
      {
        "number": "2",
        "name": "VDD18CORE",
        "type": "power_out",
        "description": "+1.8V output from the internal core regulator; must be connected together with pin 37 and each pin needs a 0.01uF decoupling capacitor, with a 4.7uF bulk capacitor (<2 Ohm ESR) in parallel on pin 2, and must not supply other external devices."
      },
      {
        "number": "3",
        "name": "GPIO0/nLED1",
        "type": "bidirectional",
        "description": "General purpose I/O 0, programmable as push-pull output, open-drain output or Schmitt-triggered input, also multiplexed as nLED1 which is driven low at 100Mb operation."
      },
      {
        "number": "4",
        "name": "GPIO1/nLED2",
        "type": "bidirectional",
        "description": "General purpose I/O 1, programmable as push-pull, open-drain or input, also multiplexed as nLED2 which is driven low when a valid link is detected and flashes for activity."
      },
      {
        "number": "5",
        "name": "GPIO2/nLED3",
        "type": "bidirectional",
        "description": "General purpose I/O 2, programmable as push-pull, open-drain or input, also multiplexed as nLED3 which is driven low when the link operates in full-duplex mode."
      },
      {
        "number": "6",
        "name": "A7",
        "type": "input",
        "description": "Bit 7 of the 7-bit host address port used to select internal CSRs and TX/RX FIFOs; ignored when FIFO_SEL is high."
      },
      {
        "number": "7",
        "name": "A6",
        "type": "input",
        "description": "Bit 6 of the 7-bit host address port used to select internal CSRs and TX/RX FIFOs; ignored when FIFO_SEL is high."
      },
      {
        "number": "8",
        "name": "A5",
        "type": "input",
        "description": "Bit 5 of the 7-bit host address port used to select internal CSRs and TX/RX FIFOs; ignored when FIFO_SEL is high."
      },
      {
        "number": "9",
        "name": "A4",
        "type": "input",
        "description": "Bit 4 of the 7-bit host address port used to select internal CSRs and TX/RX FIFOs; ignored when FIFO_SEL is high."
      },
      {
        "number": "10",
        "name": "A3",
        "type": "input",
        "description": "Bit 3 of the 7-bit host address port used to select internal CSRs and TX/RX FIFOs; ignored when FIFO_SEL is high."
      },
      {
        "number": "11",
        "name": "A2",
        "type": "input",
        "description": "Host address bit 2 of the 7-bit address port used to select internal CSRs and TX/RX FIFOs."
      },
      {
        "number": "12",
        "name": "A1",
        "type": "input",
        "description": "Host address bit 1 of the 7-bit address port used to select internal CSRs and TX/RX FIFOs."
      },
      {
        "number": "13",
        "name": "FIFO_SEL",
        "type": "input",
        "description": "When driven high, all accesses to the device go to the RX or TX data FIFOs and the upper address inputs A[7:3] are ignored."
      },
      {
        "number": "14",
        "name": "TEST",
        "type": "input",
        "description": "Reserved for internal test; must be connected to ground or pulled low with an external resistor when VDDVARIO is below 3.0V, and may be left unconnected at VDDVARIO = 3.3V."
      },
      {
        "number": "15",
        "name": "nRD",
        "type": "input",
        "description": "Active-low strobe indicating a host read cycle."
      },
      {
        "number": "16",
        "name": "nWR",
        "type": "input",
        "description": "Active-low strobe indicating a write cycle; qualified with nCS, it also wakes the device from a reduced power state."
      },
      {
        "number": "17",
        "name": "nCS",
        "type": "input",
        "description": "Active-low chip select qualifying read and write operations; qualified with nWR it also wakes the device from a reduced power state."
      },
      {
        "number": "18",
        "name": "VDDVARIO",
        "type": "power_in",
        "description": "Variable voltage I/O logic power supply pin, supporting I/O signalling from 1.8V to 3.3V."
      },
      {
        "number": "19",
        "name": "D15",
        "type": "bidirectional",
        "description": "Host data bus bit 15 of the 16-bit bi-directional data port."
      },
      {
        "number": "20",
        "name": "D14",
        "type": "bidirectional",
        "description": "Host data bus bit 14 of the 16-bit bi-directional data port."
      },
      {
        "number": "21",
        "name": "D13",
        "type": "bidirectional",
        "description": "Host data bus bit 13 of the 16-bit bi-directional data port."
      },
      {
        "number": "22",
        "name": "D12",
        "type": "bidirectional",
        "description": "Host data bus bit 12 of the 16-bit bi-directional data port."
      },
      {
        "number": "23",
        "name": "D11",
        "type": "bidirectional",
        "description": "Host data bus bit 11 of the 16-bit bi-directional data port."
      },
      {
        "number": "24",
        "name": "VDDVARIO",
        "type": "power_in",
        "description": "Variable voltage I/O logic power supply pin, supporting I/O signalling from 1.8V to 3.3V."
      },
      {
        "number": "25",
        "name": "D10",
        "type": "bidirectional",
        "description": "Host data bus bit 10 of the 16-bit bi-directional data port."
      },
      {
        "number": "26",
        "name": "D9",
        "type": "bidirectional",
        "description": "Host data bus bit 9 of the 16-bit bi-directional data port."
      },
      {
        "number": "27",
        "name": "D8",
        "type": "bidirectional",
        "description": "Host data bus bit 8 of the 16-bit bi-directional data port."
      },
      {
        "number": "28",
        "name": "D7",
        "type": "bidirectional",
        "description": "Host data bus bit 7 of the 16-bit bi-directional data port."
      },
      {
        "number": "29",
        "name": "D6",
        "type": "bidirectional",
        "description": "Host data bus bit 6 of the 16-bit bi-directional data port."
      },
      {
        "number": "30",
        "name": "VDDVARIO",
        "type": "power_in",
        "description": "Variable voltage I/O logic power supply pin, supporting I/O signalling from 1.8V to 3.3V."
      },
      {
        "number": "31",
        "name": "D5",
        "type": "bidirectional",
        "description": "Host data bus bit 5 of the 16-bit bi-directional data port."
      },
      {
        "number": "32",
        "name": "D4",
        "type": "bidirectional",
        "description": "Host data bus bit 4 of the 16-bit bi-directional data port."
      },
      {
        "number": "33",
        "name": "D3",
        "type": "bidirectional",
        "description": "Host data bus bit 3 of the 16-bit bi-directional data port."
      },
      {
        "number": "34",
        "name": "D2",
        "type": "bidirectional",
        "description": "Host data bus bit 2 of the 16-bit bi-directional data port."
      },
      {
        "number": "35",
        "name": "D1",
        "type": "bidirectional",
        "description": "Host data bus bit 1 of the 16-bit bi-directional data port."
      },
      {
        "number": "36",
        "name": "D0",
        "type": "bidirectional",
        "description": "Host data bus bit 0 of the 16-bit bi-directional data port."
      },
      {
        "number": "37",
        "name": "VDD18CORE",
        "type": "power_out",
        "description": "+1.8V output from the internal core regulator; must be connected together with pin 2 and each pin needs a 0.01uF decoupling capacitor, and must not supply other external devices."
      },
      {
        "number": "38",
        "name": "EEDIO/GPO3",
        "type": "bidirectional",
        "description": "Serial EEPROM data I/O (optional), or general purpose output GPO3, or a monitor of TX_EN/TX_CLK; it cannot function as a general purpose input."
      },
      {
        "number": "39",
        "name": "EECS",
        "type": "output",
        "description": "Serial EEPROM chip select; deasserted when pins 38 or 40 are configured as GPO or monitor signals so the EEPROM is never accessed unintentionally."
      },
      {
        "number": "40",
        "name": "EECLK/GPO4",
        "type": "bidirectional",
        "description": "Serial EEPROM clock, or general purpose output GPO4, or a monitor of RX_DV/RX_CLK; it must not be pulled low by an external resistor or driven low externally, and must be pulled up when VDDVARIO is below 3.0V."
      },
      {
        "number": "41",
        "name": "PME",
        "type": "output",
        "description": "Wakeup indicator asserted when a wake event is detected, with programmable polarity and buffer type; asserting PME does not by itself wake the device."
      },
      {
        "number": "42",
        "name": "nRESET",
        "type": "input",
        "description": "Active-low reset input that resets all logic and registers, pulled high by a weak internal pull-up, and must be reset on power-up."
      },
      {
        "number": "43",
        "name": "IRQ",
        "type": "output",
        "description": "Programmable interrupt request with programmable polarity, source and buffer type, configurable as open-drain for sharing."
      },
      {
        "number": "44",
        "name": "TPO-",
        "type": "output",
        "description": "Transmit negative output in normal connection; acts as receive negative input when HP Auto-MDIX detects or is set to a reversed connection."
      },
      {
        "number": "45",
        "name": "TPO+",
        "type": "output",
        "description": "Transmit positive output in normal connection; acts as receive positive input when HP Auto-MDIX detects or is set to a reversed connection."
      },
      {
        "number": "46",
        "name": "VDD33A",
        "type": "power_in",
        "description": "+3.3V analog power supply pin."
      },
      {
        "number": "47",
        "name": "TPI-",
        "type": "input",
        "description": "Receive negative input in normal connection; acts as transmit negative output when HP Auto-MDIX reverses the connection."
      },
      {
        "number": "48",
        "name": "TPI+",
        "type": "input",
        "description": "Receive positive input in normal connection; acts as transmit positive input when HP Auto-MDIX reverses the connection."
      },
      {
        "number": "49",
        "name": "VDD33A",
        "type": "power_in",
        "description": "+3.3V analog power supply pin."
      },
      {
        "number": "50",
        "name": "EXRES",
        "type": "input",
        "description": "PHY external bias resistor pin that must be connected to ground through a 12.4K ohm 1% resistor."
      },
      {
        "number": "51",
        "name": "VDD33A",
        "type": "power_in",
        "description": "+3.3V analog power supply pin."
      },
      {
        "number": "52",
        "name": "AMDIX_EN",
        "type": "input",
        "description": "Enables Auto-MDIX when pulled high or left unconnected and disables it when pulled low; must be pulled to a valid level by an external resistor when VDDVARIO is below 3.0V."
      },
      {
        "number": "53",
        "name": "VDD18A",
        "type": "power_in",
        "description": "+1.8V analog power supply pin that must be connected externally to VDD18CORE."
      },
      {
        "number": "54",
        "name": "XTAL2",
        "type": "output",
        "description": "External 25MHz crystal output; should be left unconnected when pin 55 is driven by a single-ended TTL oscillator."
      },
      {
        "number": "55",
        "name": "XTAL1/CLKIN",
        "type": "input",
        "description": "External 25MHz crystal input, which can alternatively be driven by a single-ended TTL oscillator (CLKIN)."
      },
      {
        "number": "56",
        "name": "VDDVARIO",
        "type": "power_in",
        "description": "Variable voltage I/O logic power supply pin, supporting I/O signalling from 1.8V to 3.3V."
      },
      {
        "number": "57",
        "name": "VSS",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The 8x8 body size is not stated in the extracted text. The only package reference is '56-QFN' (Table; The ordering code LAN9221I-ABZJ does not appear in the extracted pages. The datasheet covers LAN9221; The exposed pad has no printed pin number. It is listed as 'EXPOSED PAD MUST BE CONNECTED TO VSS' an",
          "exposed pad 57 added from the footprint",
          "dropped thermal pad ['EP'] absent from footprint",
          "1/57 pins cited to the wrong page (name found elsewhere): ['54:XTAL2@p11']"
        ],
        "pages_sent": 27,
        "cost_usd": 0.1546,
        "at": "2026-10-30T16:37:00"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/c1f68427dedfc2154226a824a897a27c.pdf",
        "pages": 141,
        "sha256": "e55ed0f7c6ba0abd",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 57,
        "described": 57,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "54eb482f12c9d8b70c1bfc78306a1c34f412f3556e225cbd097840e5abdb7981",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lan9221i-abzj-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
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        "seat": "z = 0",
        "extents_mm": [
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        "footprint_binding": "identity",
        "sha256": "40d0c0b2fcd8d94c482e5e08bc2df7e9ae5c701f1fdd5795f88a0f76be6fe4d2",
        "checked": "2026-10-30",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
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  }
}