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Contents

README

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L9963T-TR

STMicroelectronics · Power Management - Specialized · SO-16

L9963T-TR from STMicroelectronics, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIO power_in Digital Output Buffer Supply; connect to either 5 V or 3.3 V supply with operating range 3.0 V to 5.5 V.
2 SDO output SPI Serial Data Output with Push-Pull configuration; requires external pull-up or pull-down resistor to define inactive level.
3 SCK tri_state SPI Serial Clock operating as Digital Input when NSLAVE=0 (Slave) or Digital Output when NSLAVE=1 (Master); internally pulled down with 100 kΩ resistor.
4 SDI input SPI Serial Data Input; internally pulled down with 100 kΩ resistor for safety purposes; supports synchronous bit sampling at SCK edges.
5 NCS tri_state SPI Chip Select (active low) operating as Digital Input when NSLAVE=0 (Slave) or Digital Output when NSLAVE=1 (Master); internally pulled up with 100 kΩ resistor.
6 DIS bidirectional Transceiver Disable Input with Open Drain driver; release (pull high externally) to enter low power standby mode, or pull low to enable normal operation; internally pulled up with 100 kΩ resistor.
7 ISOFREQ input Isolated SPI operating frequency selection; set low for slow operation at 333 kbps (default if floating) or high for fast operation at 2.66 Mbps; internally pulled down.
8 BNE/CPOL tri_state Buffer Not Empty output when NSLAVE=0 (high when RX buffer has ≥1 frame), or SPI Clock Polarity input when NSLAVE=1; internally pulled down during Trimming & Config Latch.
9 TXAMP input Isolated SPI TX amplitude selection; set low for low amplitude/low threshold or high (VDD) for high amplitude/high threshold; internally pulled up with 100 kΩ resistor.
10 SPICLKFREQ input Analog input for SPI Master Clock frequency selection via threshold comparison; connect pull-down resistor to GND to select 250 kHz (short), 1 MHz (9.31 kΩ), 4 MHz (16.2 kΩ), or 8 MHz (22.9 kΩ).
11 TXEN/CPHA input Transmitter enable control when NSLAVE=0 (high enables SDI data transmission to TX buffer), or SPI Clock Phase selection when NSLAVE=1; internally pulled up.
12 NSLAVE input SPI Slave/Master mode selection; latched during Trimming & Config Latch; connect to GND for Slave operation or VDD for Master operation; internally pulled down.
13 GND power_in Device ground reference; all voltage measurements referenced to this pin.
14 ISOM bidirectional Isolated SPI Negative terminal for half-duplex transmission and reception over twisted-pair interface; operates with ISOP for isolated communication with differential voltage range 0 to 2.5 V.
15 ISOP bidirectional Isolated SPI Positive terminal for half-duplex transmission and reception over twisted-pair interface; operates with ISOM for isolated communication with common mode voltage 1.2 V typical.
16 VDD power_in 5 V supply input for internal logic and isolated SPI peripheral; operating range 4.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SO-16
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: L9963T-TR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: l9963t-tr-etched.step / l9963t-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l9963t-tr.step / l9963t-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (45 pp, sha256 73ab6ff0b654a9c8, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF