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L9908TR
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STMicroelectronics Brushless DC (BLDC) Motor Driver, TQFP-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# L9908TR++**STMicroelectronics** · Brushless DC (BLDC) Motor Driver · TQFP-48-EP(7x7)++L9908TR from STMicroelectronics, in a TQFP-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NCS | input | SPI Chip Select input, active LOW. |+| 2 | SCLK | input | SPI Serial Clock input, up to 10 MHz per the 32-bit SPI interface. |+| 3 | SDI | input | SPI Serial Data input. |+| 4 | SDO | output | SPI Serial Data output. |+| 5 | VIO | power_in | Power supply for digital outputs, specified at 2.5 V to 5.5 V (VIO_MOR). |+| 6 | CSO3/PVM | output | Current monitor 3 analog output, also used as phase voltage feedback output. |+| 7 | CSO2 | output | Current monitor 2 analog output. |+| 8 | CSO1 | output | Current monitor 1 analog output. |+| 9 | VDD | power_in | Power supply input for internal circuitry and the current monitor analog outputs (CSOn); VDD is the 5 V input from which the 3.3 V internal supply is generated. |+| 10 | SGND | power_in | Signal ground for analog, digital and reference circuits; all analog and digital voltages are referenced to SGND. |+| 11 | EN_BR | input | Bridge Enable input, active HIGH; input low level 0.8 V max, input high level 2 V to 65 V, internal pull-down. |+| 12 | NDIS | input | Safe switch-off activation input, active LOW; input low level 0.8 V max, input high level 2 V to 65 V, internal pull-down. |+| 13 | IS3- | input | Current monitor 3 negative differential input; withstands -14 V to 6 V. |+| 14 | IS3+ | input | Current monitor 3 positive differential input; withstands -14 V to 6 V. |+| 15 | IS2- | input | Current monitor 2 negative differential input; withstands -14 V to 6 V. |+| 16 | IS2+ | input | Current monitor 2 positive differential input; withstands -14 V to 6 V. |+| 17 | IS1- | input | Current monitor 1 negative differential input; withstands -14 V to 6 V. |+| 18 | IS1+ | input | Current monitor 1 positive differential input; withstands -14 V to 6 V. |+| 19 | SLS_3 | bidirectional | Source connection of the low-side FET, phase 3; withstands -14 V to 95 V on motor connection pins. |+| 20 | GLS_3 | bidirectional | Gate connection of the low-side FET, phase 3, driven by the integrated pre-driver. |+| 21 | SLS_2 | bidirectional | Source connection of the low-side FET, phase 2; withstands -14 V to 95 V on motor connection pins. |+| 22 | GLS_2 | bidirectional | Gate connection of the low-side FET, phase 2, driven by the integrated pre-driver. |+| 23 | SLS_1 | bidirectional | Source connection of the low-side FET, phase 1; withstands -14 V to 95 V on motor connection pins. |+| 24 | GLS_1 | bidirectional | Gate connection of the low-side FET, phase 1, driven by the integrated pre-driver. |+| 25 | CBS_3 | bidirectional | Bootstrap capacitor connection of the high-side driver, phase 3. |+| 26 | GHS_3 | bidirectional | Gate connection of the high-side FET, phase 3, driven by the integrated pre-driver. |+| 27 | SHS_3 | bidirectional | Source connection of the high-side FET, phase 3; withstands -14 V to 95 V on motor connection pins. |+| 28 | CBS_2 | bidirectional | Bootstrap capacitor connection of the high-side driver, phase 2. |+| 29 | GHS_2 | bidirectional | Gate connection of the high-side FET, phase 2, driven by the integrated pre-driver. |+| 30 | SHS_2 | bidirectional | Source connection of the high-side FET, phase 2; withstands -14 V to 95 V on motor connection pins. |+| 31 | CBS_1 | bidirectional | Bootstrap capacitor connection of the high-side driver, phase 1. |+| 32 | GHS_1 | bidirectional | Gate connection of the high-side FET, phase 1, driven by the integrated pre-driver. |+| 33 | SHS_1 | bidirectional | Source connection of the high-side FET, phase 1; withstands -14 V to 95 V on motor connection pins. |+| 34 | VDH | power_in | Drain connection of the high-side FETs and motor supply input; motor supply range 4.5 V to 75 V. |+| 35 | CP2P | bidirectional | Charge pump 2 positive terminal of the fly capacitor. |+| 36 | CP2M | bidirectional | Charge pump 2 negative terminal of the fly capacitor. |+| 37 | VBP | power_in | Pre-regulation stage power supply for the gate driver supply. |+| 38 | CP1M | bidirectional | Charge pump 1 negative terminal of the fly capacitor. |+| 39 | PGND | power_in | Power ground for charge pump 1 and charge pump 2. |+| 40 | CP1P | bidirectional | Charge pump 1 positive terminal of the fly capacitor. |+| 41 | VPRE | bidirectional | Pre-regulated voltage used for high-side and low-side FET Vgs driving. |+| 42 | INH3 | input | PWM command for high-side FET, phase 3 (active HIGH). |+| 43 | INH2 | input | PWM command for high-side FET, phase 2 (active HIGH). |+| 44 | INH1 | input | PWM command for high-side FET, phase 1 (active HIGH). |+| 45 | INL3 | input | PWM command for low-side FET, phase 3 (active HIGH). |+| 46 | INL2 | input | PWM command for low-side FET, phase 2 (active HIGH). |+| 47 | INL1 | input | PWM command for low-side FET, phase 1 (active HIGH). |+| 48 | FS_FLAG | output | Fault status flag output, active LOW. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TQFP-48-EP(7x7) |+| Category | Motor Driver ICs |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `L9908TR`+- Footprint: `Package_QFP:TQFP-48-1EP_7x7mm_P0.5mm_EP5x5mm`+- 3D model: TQFP-48-EP(7x7) (KiCad packages3D, STEP)+- 3D model files: `l9908tr-etched.step` / `l9908tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l9908tr.step` / `l9908tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905943930580992) (153 pp, sha256 `0427a2705aa0fbf9`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l9908tr-datasheet.pdf)
page.jsonadded+447@@ -0,0 +1,447 @@+{+ "slug": "l9908tr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Brushless DC (BLDC) Motor Driver, TQFP-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "l9908tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "l9908tr.kicad_sym",+ "l9908tr.kicad_mod",+ "l9908tr.glb",+ "l9908tr.step",+ "l9908tr.lbr",+ "docs/hero.png",+ "docs/l9908tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "l9908tr-hero.glb",+ "l9908tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "L9908TR",+ "manufacturer": "STMicroelectronics",+ "package": "TQFP-48-EP(7x7)",+ "pin_count": 49,+ "category": "Motor Driver ICs",+ "subcategory": "Brushless DC (BLDC) Motor Driver",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905943930580992",+ "parts": {+ "symbol": "l9908tr.kicad_sym",+ "footprint": "l9908tr.kicad_mod",+ "model_3d": "l9908tr-hero.glb",+ "model_3d_plain": "l9908tr.glb",+ "model_3d_step": "l9908tr-etched.step",+ "model_3d_step_plain": "l9908tr.step",+ "lbr": "l9908tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C5269538",+ "digikey": "497-L9908TR-ND",+ "mouser": "511-L9908TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T00:07:34Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-L9908TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-L9908TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "NCS",+ "type": "input",+ "description": "SPI Chip Select input, active LOW."+ },+ {+ "number": "2",+ "name": "SCLK",+ "type": "input",+ "description": "SPI Serial Clock input, up to 10 MHz per the 32-bit SPI interface."+ },+ {+ "number": "3",+ "name": "SDI",+ "type": "input",+ "description": "SPI Serial Data input."+ },+ {+ "number": "4",+ "name": "SDO",+ "type": "output",+ "description": "SPI Serial Data output."+ },+ {+ "number": "5",+ "name": "VIO",+ "type": "power_in",+ "description": "Power supply for digital outputs, specified at 2.5 V to 5.5 V (VIO_MOR)."+ },+ {+ "number": "6",+ "name": "CSO3/PVM",+ "type": "output",+ "description": "Current monitor 3 analog output, also used as phase voltage feedback output."+ },+ {+ "number": "7",+ "name": "CSO2",+ "type": "output",+ "description": "Current monitor 2 analog output."+ },+ {+ "number": "8",+ "name": "CSO1",+ "type": "output",+ "description": "Current monitor 1 analog output."+ },+ {+ "number": "9",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply input for internal circuitry and the current monitor analog outputs (CSOn); VDD is the 5 V input from which the 3.3 V internal supply is generated."+ },+ {+ "number": "10",+ "name": "SGND",+ "type": "power_in",+ "description": "Signal ground for analog, digital and reference circuits; all analog and digital voltages are referenced to SGND."+ },+ {+ "number": "11",+ "name": "EN_BR",+ "type": "input",+ "description": "Bridge Enable input, active HIGH; input low level 0.8 V max, input high level 2 V to 65 V, internal pull-down."+ },+ {+ "number": "12",+ "name": "NDIS",+ "type": "input",+ "description": "Safe switch-off activation input, active LOW; input low level 0.8 V max, input high level 2 V to 65 V, internal pull-down."+ },+ {+ "number": "13",+ "name": "IS3-",+ "type": "input",+ "description": "Current monitor 3 negative differential input; withstands -14 V to 6 V."+ },+ {+ "number": "14",+ "name": "IS3+",+ "type": "input",+ "description": "Current monitor 3 positive differential input; withstands -14 V to 6 V."+ },+ {+ "number": "15",+ "name": "IS2-",+ "type": "input",+ "description": "Current monitor 2 negative differential input; withstands -14 V to 6 V."+ },+ {+ "number": "16",+ "name": "IS2+",+ "type": "input",+ "description": "Current monitor 2 positive differential input; withstands -14 V to 6 V."+ },+ {+ "number": "17",+ "name": "IS1-",+ "type": "input",+ "description": "Current monitor 1 negative differential input; withstands -14 V to 6 V."+ },+ {+ "number": "18",+ "name": "IS1+",+ "type": "input",+ "description": "Current monitor 1 positive differential input; withstands -14 V to 6 V."+ },+ {+ "number": "19",+ "name": "SLS_3",+ "type": "bidirectional",+ "description": "Source connection of the low-side FET, phase 3; withstands -14 V to 95 V on motor connection pins."+ },+ {+ "number": "20",+ "name": "GLS_3",+ "type": "bidirectional",+ "description": "Gate connection of the low-side FET, phase 3, driven by the integrated pre-driver."+ },+ {+ "number": "21",+ "name": "SLS_2",+ "type": "bidirectional",+ "description": "Source connection of the low-side FET, phase 2; withstands -14 V to 95 V on motor connection pins."+ },+ {+ "number": "22",+ "name": "GLS_2",+ "type": "bidirectional",+ "description": "Gate connection of the low-side FET, phase 2, driven by the integrated pre-driver."+ },+ {+ "number": "23",+ "name": "SLS_1",+ "type": "bidirectional",+ "description": "Source connection of the low-side FET, phase 1; withstands -14 V to 95 V on motor connection pins."+ },+ {+ "number": "24",+ "name": "GLS_1",+ "type": "bidirectional",+ "description": "Gate connection of the low-side FET, phase 1, driven by the integrated pre-driver."+ },+ {+ "number": "25",+ "name": "CBS_3",+ "type": "bidirectional",+ "description": "Bootstrap capacitor connection of the high-side driver, phase 3."+ },+ {+ "number": "26",+ "name": "GHS_3",+ "type": "bidirectional",+ "description": "Gate connection of the high-side FET, phase 3, driven by the integrated pre-driver."+ },+ {+ "number": "27",+ "name": "SHS_3",+ "type": "bidirectional",+ "description": "Source connection of the high-side FET, phase 3; withstands -14 V to 95 V on motor connection pins."+ },+ {+ "number": "28",+ "name": "CBS_2",+ "type": "bidirectional",+ "description": "Bootstrap capacitor connection of the high-side driver, phase 2."+ },+ {+ "number": "29",+ "name": "GHS_2",+ "type": "bidirectional",+ "description": "Gate connection of the high-side FET, phase 2, driven by the integrated pre-driver."+ },+ {+ "number": "30",+ "name": "SHS_2",+ "type": "bidirectional",+ "description": "Source connection of the high-side FET, phase 2; withstands -14 V to 95 V on motor connection pins."+ },+ {+ "number": "31",+ "name": "CBS_1",+ "type": "bidirectional",+ "description": "Bootstrap capacitor connection of the high-side driver, phase 1."+ },+ {+ "number": "32",+ "name": "GHS_1",+ "type": "bidirectional",+ "description": "Gate connection of the high-side FET, phase 1, driven by the integrated pre-driver."+ },+ {+ "number": "33",+ "name": "SHS_1",+ "type": "bidirectional",+ "description": "Source connection of the high-side FET, phase 1; withstands -14 V to 95 V on motor connection pins."+ },+ {+ "number": "34",+ "name": "VDH",+ "type": "power_in",+ "description": "Drain connection of the high-side FETs and motor supply input; motor supply range 4.5 V to 75 V."+ },+ {+ "number": "35",+ "name": "CP2P",+ "type": "bidirectional",+ "description": "Charge pump 2 positive terminal of the fly capacitor."+ },+ {+ "number": "36",+ "name": "CP2M",+ "type": "bidirectional",+ "description": "Charge pump 2 negative terminal of the fly capacitor."+ },+ {+ "number": "37",+ "name": "VBP",+ "type": "power_in",+ "description": "Pre-regulation stage power supply for the gate driver supply."+ },+ {+ "number": "38",+ "name": "CP1M",+ "type": "bidirectional",+ "description": "Charge pump 1 negative terminal of the fly capacitor."+ },+ {+ "number": "39",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground for charge pump 1 and charge pump 2."+ },+ {+ "number": "40",+ "name": "CP1P",+ "type": "bidirectional",+ "description": "Charge pump 1 positive terminal of the fly capacitor."+ },+ {+ "number": "41",+ "name": "VPRE",+ "type": "bidirectional",+ "description": "Pre-regulated voltage used for high-side and low-side FET Vgs driving."+ },+ {+ "number": "42",+ "name": "INH3",+ "type": "input",+ "description": "PWM command for high-side FET, phase 3 (active HIGH)."+ },+ {+ "number": "43",+ "name": "INH2",+ "type": "input",+ "description": "PWM command for high-side FET, phase 2 (active HIGH)."+ },+ {+ "number": "44",+ "name": "INH1",+ "type": "input",+ "description": "PWM command for high-side FET, phase 1 (active HIGH)."+ },+ {+ "number": "45",+ "name": "INL3",+ "type": "input",+ "description": "PWM command for low-side FET, phase 3 (active HIGH)."+ },+ {+ "number": "46",+ "name": "INL2",+ "type": "input",+ "description": "PWM command for low-side FET, phase 2 (active HIGH)."+ },+ {+ "number": "47",+ "name": "INL1",+ "type": "input",+ "description": "PWM command for low-side FET, phase 1 (active HIGH)."+ },+ {+ "number": "48",+ "name": "FS_FLAG",+ "type": "output",+ "description": "Fault status flag output, active LOW."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The Exposed Pad (listed as 'Exp. PAD' in Table 1) is not a numbered pin and was omitted from pins. D; Pin descriptions are condensed to one sentence each. Voltage limits were added only where the datash; The datasheet lists the package as TQFP48 (7x7x1 mm exposed pad down), and the pinout matches the L9",+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 16,+ "cost_usd": 0.0953,+ "at": "2026-10-08T00:07:08"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905943930580992",+ "pages": 153,+ "sha256": "0427a2705aa0fbf9",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "l9908tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9.32,+ 9.32,+ 1.6+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b180586f3ee58503076782c9a1fc7102515fb0ece2d21b2fcfad5a1e2aa3df64",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "l9908tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9.32,+ 9.32,+ 1.6+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "a401cdcf3039eea3f79ee1ef333a09409b1db4d634cc0ca1918241f6e04b2bc3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}