component
L9780TR
Public Made by Adomby adom
STMicroelectronics Power Management - Specialized, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+84@@ -0,0 +1,84 @@+# L9780TR++**STMicroelectronics** · Power Management - Specialized · LQFP-48(7x7)++L9780TR from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | TG1 | passive | Switching TAG resistor pin for channel 1, connected internally to OUT1 through a TG switch of about 4 Ω. |+| 2 | SNS | input | VCCS sense pin with a specified SNS common mode range of -2 V to 2.4 V and a short-to-ground threshold of 175 to 225 mV for the positive side. |+| 3 | TST1 | input | Test mode pin 1, rated from -0.3 V to 40 V. |+| 4 | INRC | input | Reference cell input, rated from -0.3 V to +40 V, with a short-to-ground threshold of 175 to 225 mV. |+| 5 | RCT1 | passive | Impedance test pin 1, rated from -0.3 V to +40 V. |+| 6 | RCT2 | input | Impedance test amplifier input, rated from -0.3 V to +40 V. |+| 7 | SR | passive | Sensor return pin, rated from -VCCA to +40 V, with short-to-battery diagnostic on functional ground. |+| 8 | PG1 | output | Protection FET gate driver for channel 1, with output swing from 0 to 100 mV low and VCCA minus 0.1 V high at ±10 µA. |+| 9 | PG2 | output | Protection FET gate driver for channel 2, with output swing from 0 to 100 mV low and VCCA minus 0.1 V high at ±10 µA. |+| 10 | HD | input | Heater FET drain, rated from -0.3 V to 53 V with a leakage current of up to 150 µA at 53 V. |+| 11 | TST2 | input | Test mode pin 2, rated from -0.3 V to 40 V. |+| 12 | HG | output | Heater FET gate driver output, swinging from 0 to 100 mV low to VCCA minus 0.2 V high at ±10 µA. |+| 13 | SY | input | Synchronous mode pin, rated from -0.3 V to VCCI + 0.3 V. |+| 14 | PW | input | Heater PWM input pin, rated from -0.3 V to VCCI + 0.3 V. |+| 15 | SO | output | Serial data output of the SPI, rated from -0.3 V to VCCI + 0.3 V. |+| 16 | CLK | input | SPI clock input, rated from -0.3 V to VCCI + 0.3 V. |+| 17 | SI | input | Serial data input of the SPI, rated from -0.3 V to VCCI + 0.3 V. |+| 18 | CSN | input | SPI chip select input, rated from -0.3 V to VCCI + 0.3 V. |+| 19 | VCCI | power_in | Digital transfer level supply, rated 3.14 V to 5.1 V. |+| 20 | GNDD | power_in | Digital ground. |+| 21 | VCCD | power_in | Digital supply, rated 4.9 V to 5.1 V. |+| 22 | n.c. | unconnected | Not connected pin. |+| 23 | n.c. | unconnected | Not connected pin. |+| 24 | n.c. | unconnected | Not connected pin. |+| 25 | C1B | passive | Compensation network pin 1, side B, rated from -0.3 V to VCCA + 0.3 V. |+| 26 | C2B | passive | Compensation network pin 2, side B, rated from -0.3 V to VCCA + 0.3 V. |+| 27 | C3 | passive | Compensation network common pin, rated from -0.3 V to VCCA + 0.3 V. |+| 28 | C2A | passive | Compensation network pin 2, side A, rated from -0.3 V to VCCA + 0.3 V. |+| 29 | C1A | passive | Compensation network pin 1, side A, rated from -0.3 V to VCCA + 0.3 V. |+| 30 | FV | passive | VCCS filtered control voltage pin, rated from -0.3 V to VCCA + 0.3 V. |+| 31 | FVOUT | output | Analog output of the FVOUT amplifier, rated from -0.3 V to VCCA + 0.3 V. |+| 32 | BG | passive | Bandgap voltage pin, rated from -0.3 V to VCCA + 0.3 V. |+| 33 | CL2 | passive | VCCS voltage clamp channel 2, rated from -0.3 V to VCCA + 0.3 V. |+| 34 | CL1 | passive | VCCS voltage clamp channel 1, rated from -0.3 V to VCCA + 0.3 V. |+| 35 | n.c. | unconnected | Not connected pin. |+| 36 | n.c. | unconnected | Not connected pin. |+| 37 | VCCCP | power_in | Charge pump supply, rated 4.9 V to 5.1 V. |+| 38 | FLCP1 | passive | Charge pump floating pin 1, rated from -0.3 V to VCCCP + 0.3 V. |+| 39 | FLCP2 | passive | Charge pump floating pin 2, rated from CP - 0.3 V to +0.3 V. |+| 40 | GNDCP | power_in | Charge pump analog ground. |+| 41 | CP | power_out | -5 V charge pump output, rated from -6.5 V to +0.3 V. |+| 42 | VESD | passive | ESD reference voltage, rated at 40 V in the maximum ratings and +53 V absolute maximum. |+| 43 | GNDA | power_in | Analog ground. |+| 44 | VCCA | power_in | Analog supply, rated 4.9 V to 5.1 V. |+| 45 | n.c. | unconnected | Not connected pin. |+| 46 | TG2 | passive | Switching TAG resistor pin for channel 2, connected internally to OUT2 through a TG switch of about 4 Ω. |+| 47 | OUT2 | output | Pump cell output pin for channel 2, driving the VCCS with a maximum RTOT drop of 1.8 V against SNS. |+| 48 | OUT1 | output | Pump cell output pin for channel 1, driving the VCCS with a maximum RTOT drop of 1.8 V against SNS. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-48(7x7) |+| Category | Power Management (PMIC) |+| Pins | 48 |++## CAD (KiCad official)++- Symbol: `L9780TR`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `l9780tr-etched.step` / `l9780tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l9780tr.step` / `l9780tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588925519744143360) (56 pp, sha256 `bf560dfa5f013e54`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l9780tr-datasheet.pdf)
page.jsonadded+441@@ -0,0 +1,441 @@+{+ "slug": "l9780tr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Power Management - Specialized, LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "l9780tr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "l9780tr.kicad_sym",+ "l9780tr.kicad_mod",+ "l9780tr.glb",+ "l9780tr.step",+ "l9780tr.lbr",+ "docs/hero.png",+ "docs/l9780tr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "l9780tr-hero.glb",+ "l9780tr-hero.overlay.json"+ ],+ "component": {+ "mpn": "L9780TR",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-48(7x7)",+ "pin_count": 48,+ "category": "Power Management (PMIC)",+ "subcategory": "Power Management - Specialized",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588925519744143360",+ "parts": {+ "symbol": "l9780tr.kicad_sym",+ "footprint": "l9780tr.kicad_mod",+ "model_3d": "l9780tr-hero.glb",+ "model_3d_plain": "l9780tr.glb",+ "model_3d_step": "l9780tr-etched.step",+ "model_3d_step_plain": "l9780tr.step",+ "lbr": "l9780tr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2156189",+ "digikey": "497-L9780TR-ND",+ "mouser": "511-L9780TR"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T22:23:08Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-L9780TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-L9780TR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "TG1",+ "type": "passive",+ "description": "Switching TAG resistor pin for channel 1, connected internally to OUT1 through a TG switch of about 4 Ω."+ },+ {+ "number": "2",+ "name": "SNS",+ "type": "input",+ "description": "VCCS sense pin with a specified SNS common mode range of -2 V to 2.4 V and a short-to-ground threshold of 175 to 225 mV for the positive side."+ },+ {+ "number": "3",+ "name": "TST1",+ "type": "input",+ "description": "Test mode pin 1, rated from -0.3 V to 40 V."+ },+ {+ "number": "4",+ "name": "INRC",+ "type": "input",+ "description": "Reference cell input, rated from -0.3 V to +40 V, with a short-to-ground threshold of 175 to 225 mV."+ },+ {+ "number": "5",+ "name": "RCT1",+ "type": "passive",+ "description": "Impedance test pin 1, rated from -0.3 V to +40 V."+ },+ {+ "number": "6",+ "name": "RCT2",+ "type": "input",+ "description": "Impedance test amplifier input, rated from -0.3 V to +40 V."+ },+ {+ "number": "7",+ "name": "SR",+ "type": "passive",+ "description": "Sensor return pin, rated from -VCCA to +40 V, with short-to-battery diagnostic on functional ground."+ },+ {+ "number": "8",+ "name": "PG1",+ "type": "output",+ "description": "Protection FET gate driver for channel 1, with output swing from 0 to 100 mV low and VCCA minus 0.1 V high at ±10 µA."+ },+ {+ "number": "9",+ "name": "PG2",+ "type": "output",+ "description": "Protection FET gate driver for channel 2, with output swing from 0 to 100 mV low and VCCA minus 0.1 V high at ±10 µA."+ },+ {+ "number": "10",+ "name": "HD",+ "type": "input",+ "description": "Heater FET drain, rated from -0.3 V to 53 V with a leakage current of up to 150 µA at 53 V."+ },+ {+ "number": "11",+ "name": "TST2",+ "type": "input",+ "description": "Test mode pin 2, rated from -0.3 V to 40 V."+ },+ {+ "number": "12",+ "name": "HG",+ "type": "output",+ "description": "Heater FET gate driver output, swinging from 0 to 100 mV low to VCCA minus 0.2 V high at ±10 µA."+ },+ {+ "number": "13",+ "name": "SY",+ "type": "input",+ "description": "Synchronous mode pin, rated from -0.3 V to VCCI + 0.3 V."+ },+ {+ "number": "14",+ "name": "PW",+ "type": "input",+ "description": "Heater PWM input pin, rated from -0.3 V to VCCI + 0.3 V."+ },+ {+ "number": "15",+ "name": "SO",+ "type": "output",+ "description": "Serial data output of the SPI, rated from -0.3 V to VCCI + 0.3 V."+ },+ {+ "number": "16",+ "name": "CLK",+ "type": "input",+ "description": "SPI clock input, rated from -0.3 V to VCCI + 0.3 V."+ },+ {+ "number": "17",+ "name": "SI",+ "type": "input",+ "description": "Serial data input of the SPI, rated from -0.3 V to VCCI + 0.3 V."+ },+ {+ "number": "18",+ "name": "CSN",+ "type": "input",+ "description": "SPI chip select input, rated from -0.3 V to VCCI + 0.3 V."+ },+ {+ "number": "19",+ "name": "VCCI",+ "type": "power_in",+ "description": "Digital transfer level supply, rated 3.14 V to 5.1 V."+ },+ {+ "number": "20",+ "name": "GNDD",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "21",+ "name": "VCCD",+ "type": "power_in",+ "description": "Digital supply, rated 4.9 V to 5.1 V."+ },+ {+ "number": "22",+ "name": "n.c.",+ "type": "unconnected",+ "description": "Not connected pin."+ },+ {+ "number": "23",+ "name": "n.c.",+ "type": "unconnected",+ "description": "Not connected pin."+ },+ {+ "number": "24",+ "name": "n.c.",+ "type": "unconnected",+ "description": "Not connected pin."+ },+ {+ "number": "25",+ "name": "C1B",+ "type": "passive",+ "description": "Compensation network pin 1, side B, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "26",+ "name": "C2B",+ "type": "passive",+ "description": "Compensation network pin 2, side B, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "27",+ "name": "C3",+ "type": "passive",+ "description": "Compensation network common pin, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "28",+ "name": "C2A",+ "type": "passive",+ "description": "Compensation network pin 2, side A, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "29",+ "name": "C1A",+ "type": "passive",+ "description": "Compensation network pin 1, side A, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "30",+ "name": "FV",+ "type": "passive",+ "description": "VCCS filtered control voltage pin, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "31",+ "name": "FVOUT",+ "type": "output",+ "description": "Analog output of the FVOUT amplifier, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "32",+ "name": "BG",+ "type": "passive",+ "description": "Bandgap voltage pin, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "33",+ "name": "CL2",+ "type": "passive",+ "description": "VCCS voltage clamp channel 2, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "34",+ "name": "CL1",+ "type": "passive",+ "description": "VCCS voltage clamp channel 1, rated from -0.3 V to VCCA + 0.3 V."+ },+ {+ "number": "35",+ "name": "n.c.",+ "type": "unconnected",+ "description": "Not connected pin."+ },+ {+ "number": "36",+ "name": "n.c.",+ "type": "unconnected",+ "description": "Not connected pin."+ },+ {+ "number": "37",+ "name": "VCCCP",+ "type": "power_in",+ "description": "Charge pump supply, rated 4.9 V to 5.1 V."+ },+ {+ "number": "38",+ "name": "FLCP1",+ "type": "passive",+ "description": "Charge pump floating pin 1, rated from -0.3 V to VCCCP + 0.3 V."+ },+ {+ "number": "39",+ "name": "FLCP2",+ "type": "passive",+ "description": "Charge pump floating pin 2, rated from CP - 0.3 V to +0.3 V."+ },+ {+ "number": "40",+ "name": "GNDCP",+ "type": "power_in",+ "description": "Charge pump analog ground."+ },+ {+ "number": "41",+ "name": "CP",+ "type": "power_out",+ "description": "-5 V charge pump output, rated from -6.5 V to +0.3 V."+ },+ {+ "number": "42",+ "name": "VESD",+ "type": "passive",+ "description": "ESD reference voltage, rated at 40 V in the maximum ratings and +53 V absolute maximum."+ },+ {+ "number": "43",+ "name": "GNDA",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "44",+ "name": "VCCA",+ "type": "power_in",+ "description": "Analog supply, rated 4.9 V to 5.1 V."+ },+ {+ "number": "45",+ "name": "n.c.",+ "type": "unconnected",+ "description": "Not connected pin."+ },+ {+ "number": "46",+ "name": "TG2",+ "type": "passive",+ "description": "Switching TAG resistor pin for channel 2, connected internally to OUT2 through a TG switch of about 4 Ω."+ },+ {+ "number": "47",+ "name": "OUT2",+ "type": "output",+ "description": "Pump cell output pin for channel 2, driving the VCCS with a maximum RTOT drop of 1.8 V against SNS."+ },+ {+ "number": "48",+ "name": "OUT1",+ "type": "output",+ "description": "Pump cell output pin for channel 1, driving the VCCS with a maximum RTOT drop of 1.8 V against SNS."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package size: the datasheet text gives LQFP48 and the Figure 14 dimensions, but the 7x7 body size in; Pin mapping comes from Table 2 (Pin function), not the Figure 1 pin diagram, which is garbled in the; Pin types are inferred: analog and passive nodes (TG1, TG2, RCT1, SR, compensation pins, FV, BG, CL1",+ "2/48 pins cited to the wrong page (name found elsewhere): ['7:SR@p10', '17:SI@p10']"+ ],+ "pages_sent": 14,+ "cost_usd": 0.1079,+ "at": "2026-10-07T22:22:44"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588925519744143360",+ "pages": 56,+ "sha256": "bf560dfa5f013e54",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "l9780tr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "l9780tr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "694531c8aaecdda25f40b15ce5cefa717891caaeeaa1719ff9cf7f19134b0484",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}