# L9780

**STMicroelectronics** · Power Management - Specialized · LQFP-48(7x7)

L9780 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TG1 | passive | Switching TAG resistor pin for channel 1, connected to the VCCS TG switch between TG1 and OUT1. |
| 2 | SNS | input | VCCS sense pin; SNS may be driven from -VCCA to 40 V and has a design common-mode range of -2 V to 2.4 V. |
| 3 | TST1 | input | Test mode pin 1, rated for -0.3 V to 40 V. |
| 4 | INRC | input | Reference cell input, rated for -0.3 V to 40 V and protected by short-to-battery and short-to-ground diagnostics. |
| 5 | RCT1 | passive | Impedance test pin 1, rated for -0.3 V to 40 V. |
| 6 | RCT2 | input | Impedance test amplifier input, rated for -0.3 V to 40 V. |
| 7 | SR | input | Sensor return (functional ground), rated for -VCCA to 40 V and monitored by the short-to-battery diagnostic. |
| 8 | PG1 | output | Protection FET gate driver for channel 1, swinging between 0 and VCCA with a 70 kΩ to 130 kΩ pull-down. |
| 9 | PG2 | output | Protection FET gate driver for channel 2, swinging between 0 and VCCA with a 70 kΩ to 130 kΩ pull-down. |
| 10 | HD | input | Heater FET drain sense pin, rated for 0 V to 40 V (absolute maximum -0.3 V to 53 V) and used for heater diagnostics. |
| 11 | TST2 | input | Test mode pin 2, rated for -0.3 V to 40 V. |
| 12 | HG | output | Heater FET gate driver, swinging between 0 and VCCA with a 70 kΩ to 130 kΩ pull-down. |
| 13 | SY | input | Synchronous mode selection pin, rated for 0 V to VCCA. |
| 14 | PW | input | Heater PWM input pin, rated for 0 V to VCCA. |
| 15 | SO | output | SPI serial data output, referenced to the VCCI digital transfer level supply. |
| 16 | CLK | input | SPI clock input, rated for 0 V to VCCA. |
| 17 | SI | input | SPI serial data input, rated for 0 V to VCCA. |
| 18 | CSN | input | SPI chip select input, rated for 0 V to VCCA. |
| 19 | VCCI | power_in | Digital transfer level supply, rated 3.14 V to 5.1 V in operation. |
| 20 | GNDD | power_in | Digital ground. |
| 21 | VCCD | power_in | Digital supply, rated 4.9 V to 5.1 V in operation. |
| 22 | n.c. | unconnected | Not connected pin. |
| 23 | n.c. | unconnected | Not connected pin. |
| 24 | n.c. | unconnected | Not connected pin. |
| 25 | C1B | passive | Compensation network pin 1, side B, rated for -0.3 V to VCCA+0.3 V. |
| 26 | C2B | passive | Compensation network pin 2, side B, rated for -0.3 V to VCCA+0.3 V. |
| 27 | C3 | passive | Compensation network common pin, rated for -0.3 V to VCCA+0.3 V. |
| 28 | C2A | passive | Compensation network pin 2, side A, rated for -0.3 V to VCCA+0.3 V. |
| 29 | C1A | passive | Compensation network pin 1, side A, rated for -0.3 V to VCCA+0.3 V. |
| 30 | FV | passive | VCCS filtered control voltage pin, rated for -0.3 V to VCCA+0.3 V. |
| 31 | FVOUT | output | Analog output of the FVOUT amplifier, rated for -0.3 V to VCCA+0.3 V. |
| 32 | BG | passive | Bandgap voltage reference pin, rated for -0.3 V to VCCA+0.3 V. |
| 33 | CL2 | input | VCCS voltage clamp channel 2, rated for -0.3 V to VCCA+0.3 V. |
| 34 | CL1 | input | VCCS voltage clamp channel 1, rated for -0.3 V to VCCA+0.3 V. |
| 35 | n.c. | unconnected | Not connected pin. |
| 36 | n.c. | unconnected | Not connected pin. |
| 37 | VCCCP | power_in | Charge pump supply, rated 4.9 V to 5.1 V in operation. |
| 38 | FLCP1 | passive | Charge pump floating pin 1, rated for -0.3 V to VCCCP+0.3 V. |
| 39 | FLCP2 | passive | Charge pump floating pin 2, rated for CP-0.3 V to +0.3 V. |
| 40 | GNDCP | power_in | Charge pump analog ground. |
| 41 | CP | power_out | -5 V charge pump output, rated for -6.5 V to +0.3 V. |
| 42 | VESD | power_in | ESD reference voltage, rated at 40 V in operation (absolute maximum 53 V). |
| 43 | GNDA | power_in | Analog ground. |
| 44 | VCCA | power_in | Analog supply, rated 4.9 V to 5.1 V in operation. |
| 45 | n.c. | unconnected | Not connected pin. |
| 46 | TG2 | passive | Switching TAG resistor pin for channel 2, connected to the VCCS TG switch between TG2 and OUT2. |
| 47 | OUT2 | output | Pump cell output for channel 2, driven by the VCCS with RTOT between 50 Ω and 300 Ω. |
| 48 | OUT1 | output | Pump cell output for channel 1, driven by the VCCS with RTOT between 50 Ω and 300 Ω. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-48(7x7) |
| Category | Power Management (PMIC) |
| Pins | 48 |

## CAD (KiCad official)

- Symbol: `L9780`
- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`
- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `l9780-etched.step` / `l9780-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l9780.step` / `l9780.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/l9780.pdf) (56 pp, sha256 `bf560dfa5f013e54`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/l9780-datasheet.pdf)