component
L9615D013TR
Public Made by Adomby adom
STMicroelectronics CAN Transceivers, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownL9615D013TR
STMicroelectronics · CAN Transceivers · SO-8
L9615D013TR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXO | input | Transmitter input: low (GND) drives the bus dominant and high (VS) drives it recessive, with high-level input voltage 0.7 VS to VS and low-level input voltage 0 to 0.3 VS. |
| 2 | GND | power_in | Ground reference; all voltages except the bus voltage are defined with respect to this pin. |
| 3 | VS | power_in | Supply voltage, 4.5 V to 5.5 V (typically 5 V) per the electrical characteristics, with an absolute maximum range of -0.3 V to 7 V. |
| 4 | RXO | output | Receive output: high level minimum 0.9 VS in the recessive state and low level maximum 0.5 V in the dominant state, with output current limited to 1 mA (absolute maximum range -0.3 to 1 mA). |
| 5 | RX1 | output | Reference voltage output at 0.45 VS to 0.55 VS (typically 0.5 VS) with an output resistance of 2 kΩ to 9 kΩ. |
| 6 | C_L | bidirectional | Low-side CAN bus line; recessive bus voltage is 0.4 VS to 0.6 VS, bus voltage rated -5 V to 36 V, and the overvoltage protection threshold on C_L is 7 V to 10 V. |
| 7 | C_H | bidirectional | High-side CAN bus line; bus voltage rated -5 V to 36 V, with input resistance 5 kΩ to 50 kΩ in the recessive state. |
| 8 | ASC | input | Adjustable slope control: tie to GND for high speed operation up to 500 kBaud (input 0 to 0.1 VS) or to VS for low speed operation up to 125 kBaud (input 0.9 VS to VS) to reduce EMI. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | Interface |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
L9615D013TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
l9615d013tr-etched.step/l9615d013tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);l9615d013tr.step/l9615d013tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (8 pp, sha256
b4bcb842eb29b9a3, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).