L9369-TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SYS_WAKE_IN / GPIO1 / MSM_A	bidirectional	Configured by default as a digital input for system wake-up trigger in Sleep mode, and it can be disabled via SPI after the first start-up.
2	GPIO0 / MSP_A (FAULT PIN)	bidirectional	General purpose programmable I/O that can be configured as a fault pin, and it also supplies motor speed sensor stage A with short-to-GND monitoring and reverse supply protection.
3	GPIO2/MSP_B	bidirectional	General purpose programmable I/O that also supplies motor speed sensor stage B with short-to-GND monitoring and reverse supply protection.
4	GPIO3/MSM_B	bidirectional	General purpose programmable I/O that also serves as the return pin for motor speed sensor stage B with monitoring and short-circuit protection.
5	CL1	input	Low connection of the stage 1 external pump capacitor.
6	CH1	input	High connection of the stage 1 external pump capacitor.
7	CL2	input	Low connection of the stage 2 external pump capacitor.
8	CH2	input	High connection of the stage 2 external pump capacitor.
9	CP	power_out	Charge pump output voltage.
10	VSCP	power_in	Charge pump supply voltage with monitoring.
11	VBP	power_in	Battery supply and redundant supply for the charge pump stage; configuration is lost if VBP falls below VBPpermanent.
12	VSBRIDGE_A	input	Drain connection of the external H-bridge high-side NFET and measurement input for the stage A H-bridge supply voltage.
13	VSBRIDGE_B	input	Drain connection of the external H-bridge high-side NFET and measurement input for the stage B H-bridge supply voltage.
14	CSIN1M_B	input	Negative input pin of external shunt #1 connected to the CSA of stage B.
15	CSIN1P_B	input	Positive input pin of external shunt #1 connected to the CSA of stage B.
16	GL2_B	output	Gate connection of the H-bridge low-side NFET for wheel brake actuator B.
17	ACT_OFF_LS2_B	input	Safety low-side switch-off input for H-bridge stage B.
18	SL_B	input	Source connection of the H-bridge low-side switches for wheel brake actuator B.
19	ACT_OFF_LS1_B	input	Safety low-side switch-off input for H-bridge stage B.
20	GL1_B	input	Gate connection of the H-bridge low-side NFET for right wheel brake actuator B.
21	CSIN2P_B	input	Positive input signal of external shunt #2 connected to the redundant CSA for stage B.
22	CSIN2M_B	input	Negative input signal of external shunt #2 connected to the redundant CSA for stage B.
23	SH2_B	input	Source connection of the H-bridge high-side NFET for wheel brake actuator B.
24	GH2_B	output	Gate connection of the H-bridge high-side NFET for wheel brake actuator B.
25	SH1_B	input	Source connection of the H-bridge high-side NFET for wheel brake actuator B.
26	GH1_B	output	Gate connection of the H-bridge high-side NFET for wheel brake actuator B.
27	CSIN2P_A	input	Positive input signal of external shunt #2 connected to the redundant CSA for stage A.
28	CSIN2M_A	input	Negative input signal of external shunt #2 connected to the redundant CSA for stage A.
29	GL2_A	output	Gate connection of the H-bridge low-side NFET for wheel brake actuator A.
30	ACT_OFF_LS2_A	input	Safety low-side switch-off input for H-bridge stage A.
31	SL_A	input	Source connection of the H-bridge low-side switches for wheel brake actuator A.
32	ACT_OFF_LS1_A	input	Safety low-side switch-off input for H-bridge stage A.
33	GL1_A	output	Gate connection of the H-bridge low-side NFET for wheel brake actuator A.
34	SH2_A	input	Source connection of the H-bridge high-side NFET for wheel brake actuator A.
35	GH2_A	output	Gate connection of the H-bridge high-side NFET for wheel brake actuator A.
36	SH1_A	input	Source connection of the H-bridge high-side NFET for wheel brake actuator A.
37	GH1_A	output	Gate connection of the H-bridge high-side NFET for wheel brake actuator A.
38	CSIN1M_A	input	Negative input signal of external shunt #1 connected to the CSA for stage A.
39	CSIN1P_A	input	Positive input signal of external shunt #1 connected to the CSA for stage A.
40	GIO0	bidirectional	Programmable input/output for button interface control.
41	GIO1	bidirectional	Programmable input/output for button interface control.
42	GIO2	bidirectional	Programmable input/output for button interface control.
43	GIO3	bidirectional	Programmable input/output for button interface control.
44	RVPG	output	Gate driver output for reverse voltage switch control.
45	AGND	power_in	Analog reference ground connection.
46	VANALOG	power_out	Low noise analog voltage generated by the L9369 that supplies the internal current measurement path; an external capacitor is required for stabilization.
47	RST (EN_EL)	input	EN_EL is the digital enable input for GPIO (default function) and RST is the high-active reset input, enabled via a dedicated SPI bit.
48	WAU	input	Wake-up digital input; low level activates Sleep Mode.
49	V3V3VIN	power_in	3.3 V supply voltage for the L9369 output buffers.
50	SYS_WAKE/MSSUC_B	output	Digital output that wakes the system basis chip during Sleep mode only for diagnostics on the external button, and it can be disabled via SPI at first start-up.
51	HSOUT1	output	SPI programmable HS/LS current source for external bulb lamp or LED array with monitoring.
52	HSOUT0/MSSUC_A	output	SPI programmable HS/LS current source for external bulb lamp or LED array with monitoring; alternatively, motor speed sensor signal output to the microcontroller.
53	GIO8	bidirectional	Programmable input/output for button interface control.
54	GIO7	bidirectional	Programmable input/output for button interface control.
55	GIO6	bidirectional	Programmable input/output for button interface control.
56	GIO5	bidirectional	Programmable input/output for button interface control.
57	GIO4	bidirectional	Programmable input/output for button interface control.
58	GND	power_in	Digital and power ground connection.
59	SYNC5	input	Synchronization signal from the microcontroller for the ADC voltage/current measurement path.
60	SYNC1	input	Synchronization signal from the microcontroller for the ADC voltage/current measurement path.
61	MISO	output	Serial data output for SPI communication to the microcontroller.
62	SPICLK	input	Clock signal for SPI.
63	MOSI	input	Serial data input for SPI communication from the microcontroller.
64	SPICS	input	Chip select for SPI.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Power Management (PMIC)
Pins	64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Function temperature (parameters guaranteed)	Tjunction	-40		175	°C	Function temperature, parameters guaranteed	8
Application specific Rth (housing mounted on 6-layer PCB)	Rth			40	°C/W	Application specific Rth, housing mounted on 6-Layer PCB	8

CAD (KiCad official)

Symbol: L9369-TR
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: l9369-tr-etched.step / l9369-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l9369-tr.step / l9369-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (13 pp, sha256 37617cd971199d2f, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

L9369-TR

Verified L9369-TR

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README