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L9177ATR

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STMicroelectronics Power Management - Specialized, TQFP-64-EP(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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L9177ATR

STMicroelectronics · Power Management - Specialized · TQFP-64-EP(10x10)

L9177ATR from STMicroelectronics, in a TQFP-64-EP(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR input Logic input that sets the stepper motor direction.
2 NC unconnected Not connected.
3 VDD_TRK power_out Output of the 5 V tracking voltage regulator, rated 40 mA with short to battery protection.
4 REXT input External resistor connection for the precision current reference (10 kOhm 1% pull-up in the application circuit).
5 HS_OUT power_out High side switch output, protected with 100 mA minimum current limitation threshold.
6 VRIN+ input Positive differential input of the variable reluctance sensor (VRS) interface.
7 VRIN- input Negative differential input of the variable reluctance sensor (VRS) interface.
8 VROUT output Output of the variable reluctance sensor (VRS) interface.
9 O2H power_out O2 sensor heater output, clamped to 45 V with minimum guaranteed output current 3 A.
10 TACH power_out Tachometer driver output, minimum guaranteed output current 25 mA.
11 ILS_TACH input Input of the tachometer driver.
12 GND_O2H power_in Ground for the O2 sensor heater driver.
13 NC unconnected Not connected.
14 INO2H input Input command for the O2 sensor heater driver.
15 RESET output Reset signal output to the microcontroller.
16 IN_REL2 input Parallel control input for relay driver 2.
17 IN_REL1 input Parallel control input for relay driver 1.
18 NC unconnected Not connected.
19 NC unconnected Not connected.
20 REL2 power_out Relay 2 driver output, clamped to 45 V with minimum guaranteed output current 1 A.
21 GND_P_1 power_in Power ground for relay drivers 1 and 2.
22 NC unconnected Not connected.
23 REL1 power_out Relay 1 driver output, clamped to 45 V with minimum guaranteed output current 1 A.
24 NC unconnected Not connected.
25 NC unconnected Not connected.
26 NC unconnected Not connected.
27 REL3 power_out Relay 3 driver output, clamped to 45 V with minimum guaranteed output current 1 A.
28 GND_P_2 power_in Power ground for the current limited low side driver.
29 NC unconnected Not connected.
30 L power_out Current limited low side driver output, clamped to 45 V with minimum guaranteed output current 1 A (2 A during in-rush).
31 L power_out Current limited low side driver output, clamped to 45 V with minimum guaranteed output current 1 A (2 A during in-rush).
32 SO output SPI data output.
33 SI input SPI data input.
34 SCK input SPI serial clock input.
35 CS input SPI chip select input.
36 KEY input Key signal input.
37 INJ1 power_out Injector 1 driver power output, clamped to 60 V with minimum overcurrent at 2.8 A.
38 IN1 input Injector 1 driver input command.
39 GND_INJ1 power_in Ground for injector 1 driver.
40 GND_INJ2 power_in Ground for injector 2 driver.
41 IN2 input Injector 2 driver input command.
42 INJ2 power_out Injector 2 driver power output, clamped to 60 V with minimum overcurrent at 2.8 A.
43 KL_TX input K-Line transmit digital input.
44 KL_RX output K-Line receive digital output.
45 KL_LINE bidirectional K-Line bus input/output (standard ISO-9141 compatible).
46 VDD power_out Output of the 5 V main voltage regulator, rated 300 mA.
47 NC unconnected Not connected.
48 PWM input Logic input that sets the stepper motor speed.
49 VDD_SB power_out Output of the 5 V standby voltage regulator, rated 2.5 mA.
50 VB power_in Battery line supplying bridge 2, rated 6 V to 18 V operating range.
51 OUTD power_out Stepper motor bridge 2 output D.
52 NC unconnected Not connected.
53 OUTC power_out Stepper motor bridge 2 output C.
54 NC unconnected Not connected.
55 NC unconnected Not connected.
56 GND power_in Analog and power ground.
57 GND power_in Analog and power ground.
58 NC unconnected Not connected.
59 NC unconnected Not connected.
60 OUTB power_out Stepper motor bridge 1 output B.
61 OUTA power_out Stepper motor bridge 1 output A.
62 NC unconnected Not connected.
63 VB_1 power_in Battery line supplying bridge 1, rated 6 V to 18 V operating range.
64 EN input Logic input that enables the stepper motor driver.
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TQFP-64-EP(10x10)
Category Power Management (PMIC)
Pins 65

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating supply voltage range VB 6 18 V 9
Vbat switch off threshold voltage VB_off 30 32 34 V 9
Standby current from VB, VB_1 IVB(dis) 120 µA VB = VB_1 = 13 V, device disabled, KEY < 0.7 V 9
Quiescent current IVB 20 mA VB = VB_1 = 13 V, outputs floating 9
Undervoltage disable LOW threshold VB UVL 3.5 3.7 3.9 V 9
Undervoltage threshold hysteresis VB UVh 0.3 1 V 9
DC supply voltage pin VB/VB_1 -0.3 40 V 8
TACH pin -0.3 40 V 8
KEY pin -0.3 10 V To be protected with R_key to limit sourced/sinked current to ± 5 mA in dc conditions and ±20 mA during transients 8
VDD_TRK pin -2 40 V 8
KL_LINE pin -16 40 V 8
Operating temperature (ECU environment) Tamb -40 125 °C 9
Operating junction temperature Tj -40 150 °C 9
Storage temperature Tstg -40 150 °C 9
Thermal shut-down temperature Tot 155 200 °C 9
Thermal shut-down temperature hysteresis OThys 10 °C 9
Thermal resistance junction-to-ambient RTh j-amb 20 °C/W with 2s2p PCB thermally enhanced 9
Thermal resistance junction-to-case RTh j-case 2 °C/W 9
Output voltage VDD 4.9 5 5.1 V 11
Line regulation Ln_vdd -25 25 mV VB = 6 V to 18 V Iload = 150 mA 11
Load regulation Ld_vdd -25 25 mV VB = 13 V Iload = 5 mA to 300 mA 11
Max overshoot Vdd_OS 5.5 V Recovery from ISO pulse stimuli on battery line (guaranteed by design) 11
Voltage slew-rate at power-on Vdd_SR 2 25 V/ms Cload = 4.7 µF 11
Load current Idd 5 300 mA 11
Current limitation Idd_max 350 600 mA Output short to 4 V 11
Short to ground current limitation Idd_STG 350 700 mA Output shorted to GND 11
Power supply rejection ratio PSRR 40 dB Sin wave @ 1 kHz 1 Vpp; VB = 13 V; Iload = 5 mA to 300 mA 11
VB - Vdd dropout voltage Vdr5 0.3 0.75 V VB = 5 V; Iload = 300 mA 11
Output low voltage VUV_LO 0.6 V 1 < VDD < Vth_UV, Ireset = 2 mA 12
Reset current capability IUV_LO 2 mA 1 < VDD < Vth_UV, Vreset = 0.6 V 12
Leakage current Ilk 1 µA VUV_reset = 4.5 V 12
Power on UV reset delay Td_UV_rst 17 22 30 ms 12
UV reset filter TfUV_reset 25 50 75 µs VDD < Vth_UV 12
Output voltage tracking error DVddtrk -15 15 mV VB = 6 V, Itrk= 1 to 40 mA 13
Tracking output current limitation Itrk_max 50 100 mA Output short to 4 V 13
Tracking output reverse current Itrk_sb 10 mA Output shorted to VB = 16 V 13
Load current Idd 1 40 mA VDD_TRK regulator 13
Line regulation (tracking) Ln_vdd_trk -15 15 mV VB = 6 V to 18 V - Iload= 40 mA 13
Load regulation (tracking) Ld_vdd_trk -15 15 mV VB = 13 V Iload = 1 to 40 mA 13
Output voltage (standby) Vddsb 4.75 5 5.25 V 13
Line regulation (standby) Ln_vsb -25 25 mV VB = 6 V to 18 V Iload = 1 mA 13
Load regulation (standby) Ld_vsb -25 25 mV VB = 13 V Iload= 0.1 mA to 2.5 mA 13
Load current (standby) Idd 0.1 2.5 mA VDD_SB regulator 13
Current limitation (standby) Isb_max 5 50 mA Output short to 4 V 14
Voltage slew-rate at power on (standby) Vsb_SR 2 30 V/ms Cload = 1 µF 14
Ron on high side switch Ron_hs 14 Ω Ihs = 50 mA 14
Current limitation (high side) Ihs_max 100 400 mA VB = 13.5 V 14
Output current (injector) I max 2.2 A 15
Overcurrent threshold (injector) I_oc 2.8 5 A 15
Output clamping voltage (injector) VDS 55 65 V I = 2.2 A 15
On resistance (injector) Ron 0.6 Ω I = 2.2 A 15
Leakage current (injector) Ilk_off 10 µA Vout= 18 V, Key = 0 V 15
Pull-down diagnosis current (injector) Ilk_on 100 µA V out= 18 V, Key = 5 V 15
Turn on-off delay (injector) ton-off 6 µs from CMD edge to 50% output variation 15
OFF diagnostic masking time (injector) Tmask 0.75 1 1.25 ms Guaranteed by scan 15
Output current (relay) Imax 1 A 17
Overcurrent threshold (relay) I_oc 1.2 2.5 A 17
Output clamping voltage (relay) VDS 40 50 V I = 1 A 17
On resistance (relay) Ron 1.5 Ω I = 1 A 17
Linear current limitation (LSD) ILI 2 2.45 A VB = 18 V, settling time = 300 µs 17
Overcurrent threshold (LSD) Ioc 1.2 1.95 A Masked for driver during in-rush 17
Diagnosis masking time (LSD) tdgmsk 2 5 ms OFF condition, Guaranteed by scan 17
Output clamping voltage (LSD) VDS 40 50 V I = 200 mA 17
On resistance (LSD) Ron 1.5 Ω I = 200 mA 17
Inrush current mask time (LSD) Tmask_rush 252 336 420 µs Guaranteed by scan 17
Overcurrent threshold (tachometer) Ioc 100 500 mA 18
On resistance (tachometer) Ron 5 Ω I = 25 mA 18
Overcurrent threshold (stepper) Ioc 0.85 2 A ON condition 18
On resistance HS+LS (stepper) RdsON 2.6 Ω I out= 0.5 A, T j= 150 °C, V B= 14 V 18
Working frequency (stepper) fstepper 20 kHz Application info 18
Output leakage current (stepper) IDSS_OUT 10 µA Driver in OFF condition 18
Over current switch_off time (stepper) tscvb 25 µs Guaranteed by scan 18
Rise output time (stepper) trb 15 µs VB = 12 V, RI = 39 Ω 18
Fall output time (stepper) tfb 15 µs VB = 12 V, RI = 39 Ω 18
Reverse HS diode drop (stepper) Vreverse_HS 1.5 V Driver in OFF condition Iinjected= 0.5 A 18
Reverse LS diode drop (stepper) Vreverse_LS -1.5 V Driver in OFF condition ISourced = 0.5 A 18
OFF Diagnostic deglitch filter time (stepper) Tdgc_step_OFF 93.8 125 156.3 µs Guaranteed by scan 19
ON Diagnostic deglitch filter time (stepper) Tdgc_step_ON 15 20 25 µs Guaranteed by scan 19
On resistance (O2 sensor heater) Rds_ON 0.5 Ω Iout= 3 A 20
Output clamping voltage (O2 heater) VC 40 50 V Iout= 3 A 20
Overcurrent threshold (O2 heater) IOC 3.8 5 A 20
Input level high (Key) V_Key_H 3.3 V 10
Input level low (Key) V_Key_L 1.5 V 10
Internal pull down (Key) R_Key 50 150 300 kΩ 10
Key input filter time T_key_deglitch 26 40 µs Guaranteed by scan 10
Maximum delay time from Key to regulator enable T_key_delay 200 µs Time from key rising edge to 20% VDD rising edge 10
Internal pull-down/pull-up (digital pins) R_pull 50 150 250 kΩ 10
Active pull-down (DIR) I_pull_down 10 100 µA 10
Output level low (digital output) 0.4 V I sink= 2mA 10
Differential threshold at VRIN+ and VRIN- VHTH -50 50 mV 21
Common mode operating range at VRIN+ and VRIN- VCM 0 1.5 3 V 21
Diagnostic current (VRS) Idiag 35 50 65 µA Current from VRIN- when diagnostic on 21
Internal common mode resistor Rinternal_common 50 200 350 kΩ Switch off hysteresis current 21
Input bias current (VRS) IIB 2 µA VRIN+ = VRIN- = 1.5 V 21
Output leakage (VRS) Ileak 1 µA VROUT = 5 V 21
Output buffer low voltage (VRS) VOUTL 0.6 V Isink= 2 mA 21
Output current capability (VRS) IOUTL 2 mA Vout= 0.6 V 21
Output fall time (VRS) tof 300 ns CLOAD= 20 pF, RLOAD = 5 kΩ 21
Output fall time 1nF (VRS) tof_1nf 1.5 µs CLOAD= 1nF 21
Propagation delay (VRS) tprop 0.1 0.45 0.8 µs VRS INM = 0.5 V, INP applied to 1 V to make VRS OUT commuted 21
OFF Diagnostic deglitch filter time (VRS) Tdgc_VRS 24 30 36 µs Guaranteed by scan 21
Transmitter input source current (K-line) ITXsource 10 100 µA 22
Transmitter input sink current (K-line) ITXsink 2.1 µA KL_TX = VDD 22
Transmitter output low voltage (K-line) VKoutL -1 1.5 V IsinkK_LINE = 35 mA, KL_TX = Low 22
Receiver leakage current (K-line) IKleak 1 µA KL_LINE = VB, KL_TX = High 22
Transmitter short circuit current (K-line) IKshort 60 mA KL_LINE = VB, KL_TX = Low 22
Reverse battery or GND loss current (K-line) IKrev 10 mA ENABLE = KEY = VB = 0 V, KL_LINE = -13.5 22
KLINE internal pull-up IKpull-up 60 140 kΩ KL_TX = High 22
Under voltage current (K-line) IKuv 1 mA KEY = High, KL_TX = Low, VB = 13.5 V, KL_LINE = -1 V 22
KL_RX output low voltage VRXoutL 0.4 V Isink= 0.4 mA 23
Transmitter turn-on delay time Tp_HLT 5 µs CKline = 10 nF, RKline = 510 Ω 23
Transmitter fall time T_fT 10 µs CKline = 10 nF, RKline = 510 Ω 23
Max transmission operating frequency (K-line) fMax 60 kHz Application info 23
Input capacitance SI SICin 20 pF 23
Input capacitance SCK SCKCin 20 pF 23
Clock inactive time before frame tSCKCS 100 ns 23
Channels select (CS) lead time tlead 500 ns See (1) 24
CLK period tSCK 185 ns 24
Clock inactive time after frame tCSSCK 600 ns 24
CS de asserted time tCSN 600 ns 24

CAD (KiCad official)

  • Symbol: L9177ATR
  • Footprint: Package_QFP:TQFP-64-1EP_10x10mm_P0.5mm_EP5.305x5.305mm
  • 3D model: TQFP-64-EP(10x10) (KiCad packages3D, STEP)
  • 3D model files: l9177atr-etched.step / l9177atr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l9177atr.step / l9177atr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (53 pp, sha256 c31d74b08aa6c4dc, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF