# L8550QLT1G

**LRC** · Bipolar (BJT) · SOT-23

L8550QLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BASE | passive | Base terminal of the PNP silicon general-purpose transistor; device maximum ratings are VCEO -25 V, VCBO -40 V and continuous collector current IC -800 mAdc. |
| 2 | EMITTER | passive | Emitter terminal of the PNP silicon general-purpose transistor; device maximum ratings are VCEO -25 V, VCBO -40 V and continuous collector current IC -800 mAdc. |
| 3 | COLLECTOR | passive | Collector terminal of the PNP silicon general-purpose transistor; device maximum ratings are VCEO -25 V, VCBO -40 V and continuous collector current IC -800 mAdc. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `L8550QLT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `l8550qlt1g-etched.step` / `l8550qlt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l8550qlt1g.step` / `l8550qlt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586183037445427200) (4 pp, sha256 `eda1c5cc5e03ab9c`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/l8550qlt1g-datasheet.pdf)