component

L79L08ACD13TR

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-150mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs l79l08acd13tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
l79l08acd13tr-etched.fit.json l79l08acd13tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l79l08acd13tr-etched.glb l79l08acd13tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l79l08acd13tr-etched.step l79l08acd13tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l79l08acd13tr.glb Publish 0.1.0 · Ray
l79l08acd13tr.kicad_mod Publish 0.1.0 · Ray
l79l08acd13tr.kicad_sym Publish 0.1.0 · Ray
l79l08acd13tr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
l79l08acd13tr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json l79l08acd13tr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md l79l08acd13tr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

L79L08ACD13TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8-150mil

L79L08ACD13TR from STMicroelectronics, in a SOIC-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated -8 V output. Delivers up to 100 mA. Recommended output decoupling capacitor 0.1 µF to GND.
2 VIN power_in Negative unregulated input voltage. Absolute maximum -30 V for -5 to -9 V variants (applies to L79L08AC). Recommended input decoupling capacitor 0.33 µF to GND. Pins 2, 3, 6 and 7 are electrically bonded to the die attach flag for improved thermal dissipation and must all be tied together to the input rail.
3 VIN power_in Negative unregulated input voltage. Internally commoned to pins 2, 6, 7 and the die attach flag for heat-sinking. Tie to the same input net as pin 2.
4 NC unconnected No internal connection. Leave floating or tie to GND per PCB convention.
5 GND power_in Ground / common return. Reference for both input and output voltages.
6 VIN power_in Negative unregulated input voltage. Internally commoned to pins 2, 3, 7 and the die attach flag for heat-sinking. Tie to the same input net as pin 2.
7 VIN power_in Negative unregulated input voltage. Internally commoned to pins 2, 3, 6 and the die attach flag for heat-sinking. Tie to the same input net as pin 2.
8 NC unconnected No internal connection. Leave floating or tie to GND per PCB convention.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8-150mil
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • L79L08ACD13TR
  • L79L08ACZ-AP

CAD (KiCad official)

  • Symbol: L79L08ACD13TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-150mil (KiCad packages3D, STEP)
  • 3D model files: l79l08acd13tr-etched.step / l79l08acd13tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l79l08acd13tr.step / l79l08acd13tr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
l79l08acd13tr.step 122 KB You want the bare part, or you mark your own boards.
l79l08acd13tr-etched.step 2.5 MB You want the part with L79L08ACD13TR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 608 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (23 pp, sha256 bcf5edf4ea53f137, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF