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L79L05ABUTR

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs l79l05abutr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
l79l05abutr-etched.fit.json l79l05abutr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l79l05abutr-etched.glb l79l05abutr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l79l05abutr-etched.step l79l05abutr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l79l05abutr.glb Publish 0.1.0 · Ray
l79l05abutr.kicad_mod Publish 0.1.0 · Ray
l79l05abutr.kicad_sym Publish 0.1.0 · Ray
l79l05abutr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
l79l05abutr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json l79l05abutr: specified limits as data (metadata.characteristics, 19 rows from the datasheet) · Ray
README.md l79l05abutr: specified limits as data (metadata.characteristics, 19 rows from the datasheet) · Ray

L79L05ABUTR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

L79L05ABUTR from STMicroelectronics, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground / common return. Reference for both input and output voltages. On the L79L negative regulator, GND is the most positive terminal in typical operation (VIN and VOUT are both negative with respect to this pin).
2 VIN power_in Unregulated negative DC input. Absolute maximum -30 V for the -5 V version. Bypass to GND with a 0.33 µF capacitor located close to the pin. Note: in SOT-89 the metal tab/heatsink slug is electrically connected to this pin.
3 VOUT power_out Regulated -5 V negative output. Delivers up to 100 mA (internally current-limited, thermally protected). Bypass to GND with a 0.1 µF output capacitor for stability and transient response.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-89-3
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • L79L05ABUTR
  • L79L05ACUTR
  • L79L12ACUTR
  • L79L15ACUTR
  • L79L05ACZ
  • L79L05ABZ-AP
  • L79L08ACZ-AP
  • L79L05ACZ-TR
  • L79L12ACZ-TR
  • L79L05ABD13TR
  • L79L05ACD13TR
  • L79L08ACD13TR
  • L79L12ACD13TR
  • L79L15ABD13TR
  • L79L15ACD13TR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage (TJ = 25 °C) VO -4.8 -5 -5.2 V TJ = 25 °C 6
Output voltage VO -4.75 -5.25 V IO = 1 to 40 mA, VI = -7 to -20 V 6
Line regulation ∆VO 150 mV VI = -7 to -20 V, TJ = 25 °C 6
Line regulation ∆VO 100 mV VI = -8 to -20 V, TJ = 25 °C 6
Load regulation ∆VO 60 mV IO = 1 to 100 mA, TJ = 25 °C 6
Load regulation ∆VO 30 mV IO = 1 to 40 mA, TJ = 25 °C 6
Quiescent current Id 6 mA TJ = 25 °C 6
Quiescent current Id 5.5 mA TJ = 125 °C 6
Quiescent current change ∆Id 0.1 mA IO = 1 to 40 mA 6
Quiescent current change ∆Id 1.5 mA VI = -8 to -20 V 6
Supply voltage rejection SVR 41 49 dB VI = -8 to -18 V, f = 120 Hz, IO = 40 mA, TJ = 25 °C 6
Dropout voltage Vd 1.7 V 6
Output noise voltage eN 40 µV B = 10 Hz to 100 kHz, TJ = 25 °C 6
DC input voltage VI -30 V VO = -5 to -9 V 5
Output current IO 100 mA 5
Storage temperature range TSTG -40 150 °C 5
Operating junction temperature range TOP -40 125 °C For L79L05AB 5
Thermal resistance junction-case RthJC 15 °C/W SOT-89 (column placement to verify) 5
Thermal resistance junction-ambient RthJA 115 °C/W SOT-89 5

CAD (KiCad official)

  • Symbol: L79L05ABUTR
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: l79l05abutr-etched.step / l79l05abutr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l79l05abutr.step / l79l05abutr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
l79l05abutr.step 57 KB You want the bare part, or you mark your own boards.
l79l05abutr-etched.step 1.5 MB You want the part with L79L05ABUTR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 388 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (24 pp, sha256 ba2a02bb5533f64a, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF