component
L7983PU33R
Public Made by Adomby adom
STMicroelectronics DC-DC Converters, DFN-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownL7983PU33R
STMicroelectronics · DC-DC Converters · DFN-10-EP(3x3)
L7983PU33R from STMicroelectronics, in a DFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT/FB | input | Output voltage sensing pin: in the fixed-output part (L7983PU33R) it is VOUT, sensed through an internal voltage divider, with an absolute maximum of 5.5 V. |
| 2 | VBIAS | power_in | Input supply of the integrated LDO, typically tied to the regulated output or an auxiliary rail for light-load efficiency; connect to GND if unused, or bypass with 100 nF ceramic if supplied from the output or an auxiliary rail, with VBIAS limited to VIN + 0.3 V or 14 V max. |
| 3 | VCC | power_out | Output of the integrated LDO that supplies the internal analog circuitry; connect a ceramic capacitor (470 nF typ.) to filter the internal voltage reference. |
| 4 | FSW | passive | Switching frequency programming pin; connect an external resistor to VCC or GND to set the frequency (200 kHz to 2.2 MHz). |
| 5 | LNM/LCM | input | Dynamic mode select: low = Low Consumption Mode (LCM), high = Low Noise Mode (LNM); it can also accept an external clock for synchronization. |
| 6 | RST | output | Active-low open-collector output for output monitoring and power-up reset sequencing, driven low when the output is out of regulation and released once it is valid. |
| 7 | EN/UVLO | input | Active-high enable pin, VIN compatible, which can be used with an external resistor divider to set the input undervoltage lockout threshold. |
| 8 | VIN | power_in | DC input voltage; the operating input range is 3.5 V to 60 V, with an absolute maximum of 63 V. |
| 9 | LX | output | Switching node of the internal power stage; absolute maximum range is -0.3 V to VIN + 0.3 V. |
| 10 | GND | power_in | Ground pin for the device. |
| 11 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DFN-10-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 11 |
CAD (KiCad official)
- Symbol:
L7983PU33R - Footprint:
Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm - 3D model: DFN-10-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
l7983pu33r-etched.step/l7983pu33r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);l7983pu33r.step/l7983pu33r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (43 pp, sha256
ccf038b126583955, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).