component

L7912CV-DG

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-220. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentpmicl7912cv-dg
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs l7912cv-dg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (pad-position, synthesised, bottom-right) · Ray
l7912cv-dg-etched.fit.json l7912cv-dg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l7912cv-dg-etched.glb l7912cv-dg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l7912cv-dg-etched.step l7912cv-dg: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l7912cv-dg.glb Publish 0.1.0 · Ray
l7912cv-dg.kicad_mod Publish 0.1.0 · Ray
l7912cv-dg.kicad_sym Publish 0.1.0 · Ray
l7912cv-dg.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
l7912cv-dg.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (pad-position, synthesised, bottom-right) · Ray
page.json l7912cv-dg: specified limits as data (metadata.characteristics, 19 rows from the datasheet) · Ray
README.md l7912cv-dg: specified limits as data (metadata.characteristics, 19 rows from the datasheet) · Ray

L7912CV-DG

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-220

L7912CV-DG from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Common / ground reference. For a negative regulator this is the return that sits above both the negative input (VI) and negative output (VO).
2 IN power_in Negative unregulated input supply. Absolute maximum -35 V for VO = -5 to -18 V variants (covers L7912). Requires an input capacitor (CI = 2.2 uF per test circuit) close to the pin for stability.
3 OUT power_out Regulated -12 V output, sourcing up to 1.5 A with adequate heatsinking. Requires an output capacitor (CO = 1 uF per test circuit) to guarantee transient response and stability.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-220
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • L7912CV-DG
  • L7912CP
  • L7912CD2T-TR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage VO -11.5 -12 -12.5 V TJ = 25°C 9
Output voltage VO -11.4 -12 -12.6 V IO = -5 mA to -1 A, PO ≤ 15 W, VI = -15.5 to -27 V 9
Line regulation ΔVO 240 mV VI = -14.5 to -30 V, TJ = 25°C 9
Line regulation ΔVO 120 mV VI = -16 to -22 V, TJ = 25°C 9
Load regulation ΔVO 240 mV IO = 5 mA to 1.5 A, TJ = 25°C 9
Load regulation ΔVO 120 mV IO = 250 to 750 mA, TJ = 25°C 9
Quiescent current Id 3 mA TJ = 25°C 9
Quiescent current change ΔId 0.5 mA IO = 5 mA to 1 A 9
Quiescent current change ΔId 1 mA VI = -15 to -30 V 9
Supply voltage rejection SVR 54 60 dB ΔVI = 10 V, f = 120Hz 9
DC input voltage VI -35 V for VO = -5 to -18 V (applies to L7912C, VO = -12 V) 5
Storage temperature range TSTG -65 150 °C 5
Operating junction temperature range TOP 0 150 °C 5
Thermal resistance junction-case (TO-220) RthJC 5 °C/W TO-220 column 5
Thermal resistance junction-ambient (TO-220) RthJA 50 °C/W TO-220 column 5
Output voltage drift ΔVO/ΔT -0.8 mV/°C IO = 5 mA 9
Output noise voltage eN 200 µV B = 10Hz to 100kHz, TJ = 25°C 9
Dropout voltage Vd 1.1 V IO = 1 A, TJ = 25°C, ΔVO = 100 mV 9
Short circuit current Isc 1.5 A 9

CAD (KiCad official)

  • Symbol: L7912CV-DG
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: l7912cv-dg-etched.step / l7912cv-dg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l7912cv-dg.step / l7912cv-dg.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
l7912cv-dg.step 83 KB You want the bare part, or you mark your own boards.
l7912cv-dg-etched.step 754 KB You want the part with L7912CV-DG already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 203 faces against 48 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (24 pp, sha256 68ee756997bb737a, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF