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docs l78m15cdt-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
l78m15cdt-tr-etched.fit.json l78m15cdt-tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l78m15cdt-tr-etched.glb l78m15cdt-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
l78m15cdt-tr-etched.step l78m15cdt-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
l78m15cdt-tr-hero.glb Publish 0.2.1 · Ray
l78m15cdt-tr-hero.overlay.json Publish 0.2.1 · Ray
l78m15cdt-tr.glb Publish 0.1.0 · Ray
l78m15cdt-tr.kicad_mod Publish 0.1.0 · Ray
l78m15cdt-tr.kicad_sym Publish 0.1.0 · Ray
l78m15cdt-tr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
l78m15cdt-tr.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.1 · Ray
README.md l78m15cdt-tr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

L78M15CDT-TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252-2(DPAK)

L78M15CDT-TR from STMicroelectronics, in a TO-252-2(DPAK). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INPUT power_in Unregulated DC input voltage pin. Absolute maximum 35 V (for VO = 5-18 V variants, applies to 15 V option). Requires a 0.33 uF bypass capacitor to ground close to the pin per Figure 4/Figure 5 application circuit.
2 GROUND power_in Common ground reference pin. Electrically connected to the DPAK metal tab/backside, which is the primary thermal path for heat-sinking.
3 OUTPUT power_out Regulated +15 V output pin, up to 0.5 A output current with internal current limit and SOA/thermal protection. Recommended output capacitor is 0.1 uF to ground for stability and transient response.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-252-2(DPAK)
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • L78M15CDT-TRT
  • L78M15CDT-TRP
  • L78M15CDT-TR
  • L78M15CDT-TRDP

CAD (KiCad official)

  • Symbol: L78M15CDT-TR
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252-2(DPAK) (KiCad packages3D, STEP)
  • 3D model files: l78m15cdt-tr-etched.step / l78m15cdt-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l78m15cdt-tr.step / l78m15cdt-tr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
l78m15cdt-tr.step 119 KB You want the bare part, or you mark your own boards.
l78m15cdt-tr-etched.step 1.6 MB You want the part with L78M15CDT-TR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 437 faces against 83 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (46 pp, sha256 bf25de1549fb4045, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF