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L78M09CDT-TR

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-2(DPAK). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs l78m09cdt-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
l78m09cdt-tr-etched.fit.json l78m09cdt-tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l78m09cdt-tr-etched.glb l78m09cdt-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
l78m09cdt-tr-etched.step l78m09cdt-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray
l78m09cdt-tr-hero.glb Publish 0.2.1 · Ray
l78m09cdt-tr-hero.overlay.json Publish 0.2.1 · Ray
l78m09cdt-tr.glb Publish 0.1.0 · Ray
l78m09cdt-tr.kicad_mod Publish 0.1.0 · Ray
l78m09cdt-tr.kicad_sym Publish 0.1.0 · Ray
l78m09cdt-tr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
l78m09cdt-tr.step Publish 0.1.0 · Ray
package.json Publish 0.2.1 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json Publish 0.2.1 · Ray
README.md l78m09cdt-tr: specified limits as data (metadata.characteristics, 19 rows from the datasheet) · Ray

L78M09CDT-TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252-2(DPAK)

L78M09CDT-TR from STMicroelectronics, in a TO-252-2(DPAK). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INPUT power_in Unregulated positive DC input. For a 9 V output, V_I must be at least a few volts above V_O; absolute maximum V_I = 35 V (for V_O = 5-18 V). A 0.33 uF ceramic capacitor to GND is recommended close to the pin.
2 GROUND power_in Common ground reference. On DPAK, pin 2 is electrically tied to the exposed heat-sink tab, which is the primary thermal path (R_thJC = 8 C/W, R_thJA = 100 C/W). Solder the tab to a copper pour for heat dissipation.
3 OUTPUT power_out Regulated +9 V DC output, up to 0.5 A (peak >0.5 A with adequate heatsinking). Internally current-limited and SOA-protected. A 0.1 uF ceramic capacitor to GND is recommended to improve transient response and stability.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-252-2(DPAK)
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • L78M09CDT-TRT
  • L78M09CDT-TRP
  • L78M09CDT-TR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage VO 8.65 9 9.35 V 13
Output voltage VO 8.55 9 9.45 V IO = 5 to 350 mA, VI = 11.5 to 24 V 13
Line regulation ∆VO 100 mV VI = 11.5 to 25 V, IO = 200 mA 13
Line regulation ∆VO 50 mV VI = 12 to 25 V, IO = 200 mA 13
Load regulation ∆VO 180 mV IO = 5 to 500 mA, TJ = 25 °C 13
Load regulation ∆VO 90 mV IO = 5 to 200 mA, TJ = 25 °C 13
Quiescent current Id 6 mA 13
Quiescent current change ∆Id 0.5 mA IO = 5 to 350 mA 13
Quiescent current change ∆Id 0.8 mA IO = 200 mA, VI = 11.5 to 25 V 13
Output voltage drift ∆VO/∆T -0.5 mV/°C IO = 5 mA, TJ = 0 to 125 °C 13
Supply voltage rejection SVR 56 dB VI = 12.5 to 23 V, f = 120 Hz, IO = 300 mA 13
Output noise voltage eN 58 µV B = 10 Hz to 100 kHz 13
Dropout voltage Vd 2 V 13
Short circuit current Isc 250 mA VI = 35 V 13
DC input voltage (for VO = 5 to 18 V) VI 35 V for VO = 5 to 18 V 5
Storage temperature range TSTG -65 150 °C 5
Operating junction temperature range TOP 0 150 °C for L78MxxC 5
Thermal resistance junction-case (DPAK) RthJC 8 °C/W DPAK 5
Thermal resistance junction-ambient (DPAK) RthJA 100 °C/W DPAK 5

CAD (KiCad official)

  • Symbol: L78M09CDT-TR
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252-2(DPAK) (KiCad packages3D, STEP)
  • 3D model files: l78m09cdt-tr-etched.step / l78m09cdt-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l78m09cdt-tr.step / l78m09cdt-tr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
l78m09cdt-tr.step 119 KB You want the bare part, or you mark your own boards.
l78m09cdt-tr-etched.step 1.7 MB You want the part with L78M09CDT-TR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 458 faces against 83 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (47 pp, sha256 7cee4c5f6a43332c, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF