component
L78L18CD13TR
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SO-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownL78L18CD13TR
STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SO-8
L78L18CD13TR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated +18 V output. Delivers up to 100 mA with typical dropout of ~2 V. Bypass with 0.1 µF to GND close to the pin. |
| 2 | GND | power_in | Ground / common return. Pins 2, 3, 6 and 7 are electrically commoned to the die-attach flag internally to reduce package thermal resistance; all four should be tied to the ground plane for best heat-sinking. |
| 3 | GND | power_in | Ground / common return. Internally tied to the die-attach flag together with pins 2, 6 and 7 for improved thermal dissipation. |
| 4 | NC | unconnected | No internal connection. May be left floating or tied to GND for improved layout. |
| 5 | NC | unconnected | No internal connection. May be left floating or tied to GND for improved layout. |
| 6 | GND | power_in | Ground / common return. Internally tied to the die-attach flag together with pins 2, 3 and 7 for improved thermal dissipation. |
| 7 | GND | power_in | Ground / common return. Internally tied to the die-attach flag together with pins 2, 3 and 6 for improved thermal dissipation. |
| 8 | VIN | power_in | Unregulated DC input. For the 18 V variant the absolute maximum input voltage is 35 V (VO = 12 to 15 V range) / 40 V (VO = 18 to 24 V range); nominal operating input is roughly VOUT + 2 V dropout upward. Bypass with 0.33 µF to GND close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SO-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
L78L18CD13TRL78L18CD13TRZL78L18CD13TRAZL78L18CD13TRACZ
CAD (KiCad official)
- Symbol:
L78L18CD13TR - Footprint:
Package_SO:TI_SO-PowerPAD-8 - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
l78l18cd13tr-etched.step/l78l18cd13tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);l78l18cd13tr.step/l78l18cd13tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (40 pp, sha256
8b73c521b7f1b36e, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).