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L78L15ABUTR

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs l78l15abutr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
l78l15abutr-etched.fit.json l78l15abutr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l78l15abutr-etched.glb l78l15abutr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l78l15abutr-etched.step l78l15abutr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
l78l15abutr.glb Publish 0.1.0 · Ray
l78l15abutr.kicad_mod Publish 0.1.0 · Ray
l78l15abutr.kicad_sym Publish 0.1.0 · Ray
l78l15abutr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
l78l15abutr.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json l78l15abutr: specified limits as data (metadata.characteristics, 19 rows from the datasheet) · Ray
README.md l78l15abutr: specified limits as data (metadata.characteristics, 19 rows from the datasheet) · Ray

L78L15ABUTR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

L78L15ABUTR from STMicroelectronics, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated +15 V positive output. Delivers up to 100 mA with typical dropout of ~1.7 V (VIN must be ≥ ~17 V for full regulation). A 0.1 µF ceramic bypass capacitor to GND close to this pin is recommended to improve transient response and stability.
2 GND power_in Device ground / common return for input and output. In the SOT-89 package the GND pin is electrically bonded to the die-attach flag on the bottom of the package, which serves as the primary thermal path to the PCB copper.
3 VIN power_in Unregulated positive DC input. Absolute maximum 35 V for the 15 V variant; recommended VIN ≥ VOUT + dropout (~17 V) for full regulation. Bypass with a 0.33 µF ceramic capacitor to GND close to this pin to prevent oscillation and improve line transient response.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOT-89-3
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • L78L15ABUTR
  • L78L15ABUTRZ
  • L78L15ABUTRAZ
  • L78L15ABUTRABZ
  • L78L15ABUTRCZ
  • L78L15ABUTRACZ
  • L78L15ABUTRD
  • L78L15ABUTRD-TR
  • L78L15ABUTRABD

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage (TJ = 25 °C) VO 14.4 15 15.6 V TJ = 25 °C 22
Output voltage (IO = 1 to 40 mA) VO 14.25 15.75 V IO = 1 to 40 mA, VI = 17.5 to 30 V 22
Output voltage (IO = 1 to 70 mA) VO 14.25 15.75 V IO = 1 to 70 mA, VI = 23 V 22
Line regulation ∆VO 300 mV VI = 17.5 to 30 V, TJ = 25 °C 22
Line regulation ∆VO 250 mV VI = 20 to 30 V, TJ = 25 °C 22
Load regulation ∆VO 150 mV IO = 1 to 100 mA, TJ = 25 °C 22
Load regulation ∆VO 75 mV IO = 1 to 40 mA, TJ = 25 °C 22
Quiescent current Id 6.5 mA TJ = 25 °C 22
Quiescent current Id 6 mA TJ = 125 °C 22
Quiescent current change ∆Id 0.1 mA IO = 1 to 40 mA 22
Quiescent current change ∆Id 1.5 mA VI = 20 to 30 V 22
Supply voltage rejection SVR 34 39 dB VI = 18.5 to 28.5 V, f = 120 Hz, IO = 40 mA, TJ = 25 °C 22
Dropout voltage Vd 1.7 V 22
Output noise voltage eN 90 µV B = 10 Hz to 100 kHz, TJ = 25 °C 22
DC input voltage VI 35 V VO = 12 to 15 V 5
Output current IO 100 mA 5
Storage temperature range TSTG -65 150 °C 5
Operating junction temperature range (AB grade) TOP -40 125 °C for L78LxxAB 5
Thermal resistance junction-ambient (SOT-89) RthJA 55 °C/W Considering 6 cm² of copper Board heat-sink (note 1) 5

CAD (KiCad official)

  • Symbol: L78L15ABUTR
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: l78l15abutr-etched.step / l78l15abutr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l78l15abutr.step / l78l15abutr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
l78l15abutr.step 57 KB You want the bare part, or you mark your own boards.
l78l15abutr-etched.step 1.4 MB You want the part with L78L15ABUTR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 378 faces against 42 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (45 pp, sha256 43922ae159face7e, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF