# L78L12A

**UMW** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8

L78L12A from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTPUT | power_out | Regulated 12V output of the 78L12A, rated for up to 100mA maximum output current, with a 0.1µF output capacitor recommended. |
| 2 | GND | power_in | Ground pin, internally common with the other GND pins (2, 3, 6, 7) of the SOP-8 package. |
| 3 | GND | power_in | Ground pin, internally common with the other GND pins (2, 3, 6, 7) of the SOP-8 package. |
| 4 | NC | unconnected | No connection. |
| 5 | NC | unconnected | No connection. |
| 6 | GND | power_in | Ground pin, internally common with the other GND pins (2, 3, 6, 7) of the SOP-8 package. |
| 7 | GND | power_in | Ground pin, internally common with the other GND pins (2, 3, 6, 7) of the SOP-8 package. |
| 8 | INPUT | power_in | Unregulated supply input, absolute maximum 35V for output voltages of 3.3 to 18V, with a 0.33µF input capacitor recommended. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (A grade, TJ=25°C) | VO | 11.76 | 12 | 12.24 | V | TJ=25°C | 9 |
| Output voltage (A grade, line range, IO=1mA~40mA) | VO | 11.64 | 12 | 12.36 | V | 14.5V≤VI≤27V,IO=1mA~40mA | 9 |
| Output voltage (A grade, line range, IO=1mA~70mA) | VO | 11.64 | 12 | 12.36 | V | 14.5V≤VI≤VMAX,IO=1mA~70mA | 9 |
| Quiescent current | Iq |  |  | 5.5 | mA | TJ=25°C | 9 |
| Quiescent current change (line) | ΔIq |  |  | 15 | mA | 16V≤VI≤27V | 9 |
| Quiescent current change (load) | ΔIq |  |  | 0.1 | mA | 1mA≤IO≤40mA | 9 |
| Load regulation | ΔVO |  |  | 150 | mV | TJ=25°C, IO=1mA~100mA | 9 |
| Load regulation | ΔVO |  |  | 75 | mV | TJ=25°C, IO=1mA~70mA | 9 |
| Line regulation | ΔVO |  |  | 300 | mV | 14.5V ≤VI≤27V,TJ=25°C | 9 |
| Line regulation | ΔVO |  |  | 250 | mV | 16V ≤VI≤27V,TJ=25°C | 9 |
| Input voltage | VI |  |  | 35 | V | for VO=3.3 to 18V | 2 |
| Junction temperature range | TOPR | -20 |  | 120 | °C |  | 2 |
| Storage temperature range | TSTG | -55 |  | 150 | °C |  | 2 |
| Power dissipation | Pd |  |  | 400 | mW | SOP-8 package | 2 |
| Output noise voltage | VN |  | 36 |  | µV | 10Hz ≤f≤100kHz | 9 |
| Temperature coefficient of VO | ΔVO/ΔT |  | 1 |  | mV/°C | IO=5mA | 9 |
| Ripple rejection | RR |  | 42 |  | dB | 15V≤VI≤25V,f=120Hz,TJ=25°C | 9 |
| Dropout voltage | Vd |  | 1.7 |  | V |  | 9 |

## CAD (KiCad official)

- Symbol: `L78L12A`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `l78l12a-etched.step` / `l78l12a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l78l12a.step` / `l78l12a.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755873186757906432) (22 pp, sha256 `3eeae843c9f51425`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/l78l12a-datasheet.pdf)