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L7824CD2T-TR

Public Made by Adom

by adom

STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, D2PAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs l7824cd2t-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
viewers l7824cd2t-tr: viewers · Ray 1mo ago
l7824cd2t-tr-etched.fit.json l7824cd2t-tr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
l7824cd2t-tr-etched.glb l7824cd2t-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
l7824cd2t-tr-etched.step l7824cd2t-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
l7824cd2t-tr.glb Publish 0.1.0 · Ray 1mo ago
l7824cd2t-tr.kicad_mod Publish 0.1.0 · Ray 1mo ago
l7824cd2t-tr.kicad_sym Publish 0.1.0 · Ray 1mo ago
l7824cd2t-tr.lbr Publish 0.1.0 · Ray 1mo ago
l7824cd2t-tr.step Publish 0.1.0 · Ray 1mo ago
package.json l7824cd2t-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
page.json l7824cd2t-tr: etch along the lead row, tab up; full MPN text (service-occt 1.9.3) (service-occt 1.6.0, from the plain S… · Ray 25d ago
README.md Initial commit: component/l7824cd2t-tr · Ray 1mo ago

L7824CD2T-TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · D2PAK

L7824CD2T-TR from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INPUT power_in Unregulated DC input supply pin, labeled INPUT in Figure 3 pin connections (top view) for the D²PAK package; per Table 1 absolute maximum ratings the DC input voltage must not exceed 40 V for this VO=24 V version (35 V for VO=5-18 V versions), and per Table 18 (L7824C) the input is exercised up to VI=38 V.
2 GND power_in Ground/common reference pin, shown as the 'GND' tab in Figure 3 pin connections (top view); this tab is the exposed metal mounting surface used for heat sinking, with thermal resistance junction-to-case of 3 °C/W and junction-to-ambient of 62.5 °C/W for the D²PAK package per Table 2.
3 OUTPUT power_out Regulated output pin, labeled OUTPUT in Figure 3, delivering a fixed 24 V output (23 to 25 V, typ. 24 V at TJ=25 °C, per Table 18 for L7824C) with output current up to 1.5 A per the Features list, internal current limiting, thermal shutdown and SOA protection.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package D2PAK
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: L7824CD2T-TR
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)
  • 3D model files: l7824cd2t-tr-etched.step / l7824cd2t-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l7824cd2t-tr.step / l7824cd2t-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (55 pp, sha256 f7b390b5c05e0aba, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF