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Initial commit: component/l7824cd2t-tr

Ray ·fa3808e039 ·1mo ago
2 files changed +153
README.mdadded+39
@@ -0,0 +1,39 @@+# L7824CD2T-TR++**STMicroelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · D2PAK++L7824CD2T-TR from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | INPUT | power_in | Unregulated DC input supply pin, labeled INPUT in Figure 3 pin connections (top view) for the D²PAK package; per Table 1 absolute maximum ratings the DC input voltage must not exceed 40 V for this VO=24 V version (35 V for VO=5-18 V versions), and per Table 18 (L7824C) the input is exercised up to VI=38 V. |+| 2 | GND | power_in | Ground/common reference pin, shown as the 'GND' tab in Figure 3 pin connections (top view); this tab is the exposed metal mounting surface used for heat sinking, with thermal resistance junction-to-case of 3 °C/W and junction-to-ambient of 62.5 °C/W for the D²PAK package per Table 2. |+| 3 | OUTPUT | power_out | Regulated output pin, labeled OUTPUT in Figure 3, delivering a fixed 24 V output (23 to 25 V, typ. 24 V at TJ=25 °C, per Table 18 for L7824C) with output current up to 1.5 A per the Features list, internal current limiting, thermal shutdown and SOA protection. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | D2PAK |+| Category | Power Management (PMIC) |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `L7824CD2T-TR`+- Footprint: `Package_TO_SOT_SMD:TO-263-2`+- 3D model: D2PAK (KiCad packages3D, STEP)+- 3D model files: `l7824cd2t-tr-etched.step` / `l7824cd2t-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l7824cd2t-tr.step` / `l7824cd2t-tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894288163295232) (55 pp, sha256 `f7b390b5c05e0aba`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-5` (text+vision), consensus `claude-opus-4-8` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l7824cd2t-tr-datasheet.pdf)
page.jsonadded+114
@@ -0,0 +1,114 @@+{+  "slug": "l7824cd2t-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, D2PAK. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "l7824cd2t-tr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "l7824cd2t-tr.kicad_sym",+    "l7824cd2t-tr.kicad_mod",+    "l7824cd2t-tr.glb",+    "l7824cd2t-tr.step",+    "l7824cd2t-tr.lbr",+    "docs/hero.png",+    "docs/l7824cd2t-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "L7824CD2T-TR",+    "manufacturer": "STMicroelectronics",+    "package": "D2PAK",+    "pin_count": 3,+    "category": "Power Management (PMIC)",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894288163295232",+    "parts": {+      "symbol": "l7824cd2t-tr.kicad_sym",+      "footprint": "l7824cd2t-tr.kicad_mod",+      "model_3d": "l7824cd2t-tr-etched.glb",+      "model_3d_plain": "l7824cd2t-tr.glb",+      "model_3d_step": "l7824cd2t-tr-etched.step",+      "model_3d_step_plain": "l7824cd2t-tr.step",+      "lbr": "l7824cd2t-tr.lbr"+    },+    "distributor_links": {+      "lcsc": "C435898"+    },+    "pins": [+      {+        "number": "1",+        "name": "INPUT",+        "type": "power_in",+        "description": "Unregulated DC input supply pin, labeled INPUT in Figure 3 pin connections (top view) for the D²PAK package; per Table 1 absolute maximum ratings the DC input voltage must not exceed 40 V for this VO=24 V version (35 V for VO=5-18 V versions), and per Table 18 (L7824C) the input is exercised up to VI=38 V."+      },+      {+        "number": "2",+        "name": "GND",+        "type": "power_in",+        "description": "Ground/common reference pin, shown as the 'GND' tab in Figure 3 pin connections (top view); this tab is the exposed metal mounting surface used for heat sinking, with thermal resistance junction-to-case of 3 °C/W and junction-to-ambient of 62.5 °C/W for the D²PAK package per Table 2."+      },+      {+        "number": "3",+        "name": "OUTPUT",+        "type": "power_out",+        "description": "Regulated output pin, labeled OUTPUT in Figure 3, delivering a fixed 24 V output (23 to 25 V, typ. 24 V at TJ=25 °C, per Table 18 for L7824C) with output current up to 1.5 A per the Features list, internal current limiting, thermal shutdown and SOA protection."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-sonnet-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-4-8",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Figure 3 (page 3) shows only functional pin labels (GND/tab, OUTPUT, INPUT) for the D²PAK package; n; The D²PAK variant used for this MPN (per Table 23 title 'D²PAK (SMD 2L STD-ST)') has only two formed",+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 55,+        "cost_usd": 1.2948,+        "at": "2026-09-22T19:13:53"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894288163295232",+        "pages": 55,+        "sha256": "f7b390b5c05e0aba",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file