L6986TR from STMicroelectronics, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RST	output	RST is an open-collector output that is driven low when the output voltage is out of regulation and is released after an adjustable DELAY time once the output is over the active delay threshold.
2	VCC	power_out	VCC is the internal LDO output that requires a ceramic capacitor of at least 470 nF to filter the internal voltage reference and supplies the embedded analog circuitry.
3	SS/INH	input	Pulling this pin to GND with an open-collector stage disables the device (INH mode), and an internal 4 A typical current generator charges the external soft-start capacitor.
4	SYNCH	input	This pin provides master/slave synchronization and should be left floating when not used in LNM.
5	FSW	input	A pull-up resistor (E24 series) to VCC or pull-down to GND selects the switching frequency, with pinstrapping active only before the soft-start phase.
6	MLF	input	A pull-up resistor (E24 series) to VCC or pull-down to GND selects low noise or low consumption mode and the active RST threshold, with pinstrapping active only before the soft-start phase.
7	COMP	output	COMP is the output of the error amplifier, where the compensation network is connected.
8	DELAY	passive	An external capacitor on this pin sets the time delay before the RST open-collector output is asserted after the output exceeds the reset threshold, and if left floating RST acts like a power good.
9	FB	input	FB is the inverting input of the error amplifier, with a feedback reference of 0.85 V typical.
10	SGND	power_in	SGND is the signal ground and must be connected to the exposed pad.
11	PGND	power_in	PGND is the power ground and must be connected to the exposed pad.
12	PGND	power_in	PGND is the power ground and must be connected to the exposed pad.
13	LX	output	LX is the switching node, with absolute maximum rating of -0.3 V to VIN + 0.3 V and high-side/low-side switch current limited to 2 A.
14	LX	output	LX is the switching node, with absolute maximum rating of -0.3 V to VIN + 0.3 V and high-side/low-side switch current limited to 2 A.
15	VIN	power_in	VIN is the DC input voltage, with operating range of 4 V to 38 V and absolute maximum of 40 V.
16	VBIAS	input	VBIAS is typically connected to the regulated output voltage and can take an external reference to improve light-load efficiency, or be connected to GND if not used.
17	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	HTSSOP-16-EP
Category	Power Management (PMIC)
Pins	17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Operating input voltage range	VIN	4		38	V		8
Input voltage absolute maximum	VIN	-0.3		40	V		6
Operating temperature range	TJ	-40		150	°C		6
Storage temperature range	TSTG	-65		150	°C		6
Lead temperature (soldering 10 sec)	TLEAD			260	°C	soldering 10 sec	6
High-side / low-side switch current	IHS, ILS			2	A	high-side / low-side switch current	6
Reference voltage feedback	VFB	0.841	0.85	0.859	V		9
RST threshold release delay	VTHD	1.19	1.234	1.258	V	VFB > VTHR	10
Overvoltage trip	VOVP	1.15	1.2	1.25	VOVP/VREF		10
Overvoltage hysteresis	VOVP HYST	0.5	2	5	%		10
SS discharge voltage	VSS_L_CLMP	855	900	945	mV	VCC < VCCH OR t < TSS SETUP OR thermal fail	9
Start of internal error amplifier ramp	VSS START	0.995	1.1	1.15	V		9
SS/INH VSS threshold	VINH	200	460	700	mV	SS rising	9
Transconductance	Gm	85	155	210	µS		9
Quiescent current from VIN LCM SWO	IQ OPVIN	4	10	15	µA	LCM - SWO, VREF < VFB < VOVP (SLEEP), VBIAS = 3.3 V	9
Quiescent current from VIN LCM NO SWO	IQ OPVIN	45	70	100	µA	LCM - NO SWO, VREF < VFB < VOVP (SLEEP), VBIAS = GND	9
Quiescent current from VIN LNM SWO	IQ OPVIN	0.5	1.5	5	mA	LNM - SWO, VFB = GND (NO SLEEP), VBIAS = 3.3 V	9
Quiescent current from VIN LNM NO SWO	IQ OPVIN	2	2.8	6	mA	LNM - NO SWO, VFB = GND (NO SLEEP), VBIAS = GND	9
Quiescent current from VBIAS LCM SWO	IQ OPVBIAS	30	50	90	µA	LCM - SWO, VREF < VFB < VOVP (SLEEP), VBIAS = 3.3 V	9
Quiescent current from VBIAS LNM SWO	IQ OPVBIAS	0.5	1.2	5	mA	LNM - SWO, VFB = GND (NO SLEEP), VBIAS = 3.3 V	9
Shutdown current from VIN	ISHTDWN	4	8	15	µA	VSS/INH = GND	9
Selected RST threshold (RVCC 0, RGND NC, LCM)	VRST	0.779	0.791	0.802	V	RVCC = 0, RGND = NC, LCM, VRST/VOUT 93%	12
Selected RST threshold (RVCC NC, RGND 0, LNM)	VRST	0.779	0.791	0.802	V	RVCC = NC, RGND = 0, LNM, VRST/VOUT 93%	12
Selected switching frequency	fSW	225	250	275	kHz	RVCC = 0, RGND = NC	11
Selected switching frequency	fSW	450	500	550	kHz	RVCC = NC, RGND = 0	11
Selected switching frequency	fSW	900	1000	1100	kHz	RVCC = NC, RGND = 3.3 k	11
Selected switching frequency	fSW	1575	1750	1925	kHz	RVCC = NC, RGND = 33 k; no synchronization as slave in LNM	11
Selected switching frequency	fSW	1800	2000	2200	kHz	RVCC = NC, RGND = 56 k; no synchronization as slave in LNM	11
High-side RDSON	RDSON HS		0.18	0.36	Ω	ISW = 1 A	8
Low-side RDSON	RDSON LS		0.15	0.3	Ω	ISW = 1 A	8
Thermal resistance junction ambient	Rth JA		40		°C/W	device soldered on the STMicroelectronics demonstration board	7
Thermal resistance junction to exposed pad	Rth JC		5		°C/W	for board design, not suggested to estimate TJ from power losses	7
Thermal shutdown temperature	TSHDWN		165		°C	not tested in production	10
Thermal shutdown hysteresis	THYS		30		°C	not tested in production	10

CAD (KiCad official)

Symbol: L6986TR
Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
3D model files: l6986tr-etched.step / l6986tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l6986tr.step / l6986tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (68 pp, sha256 59e9f81936259e74, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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L6986TR

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