component
L6986F
Public Made by Adomby adom
STMicroelectronics DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# L6986F++**STMicroelectronics** · DC-DC Converters · HTSSOP-16-EP++L6986F from STMicroelectronics, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RST | output | RST open-collector output is driven low when the output voltage is out of regulation and is released after an adjustable DELAY time once the output is above the active delay threshold. |+| 2 | VCC | power_out | Ceramic capacitor (≥ 470 nF) must be connected to filter the internal voltage reference, and this LDO pin supplies the embedded analog circuitry (VCC LDO output 2.9 V to 3.6 V, 3.3 V typ.). |+| 3 | SS/INH | bidirectional | An open-collector stage can disable the device when this pin is clamped to GND (INH mode), and an internal current generator (4 µA typ.) charges the external capacitor to implement soft-start. |+| 4 | SYNCH/ISKP | input | This pin provides master/slave synchronization in low noise mode (LNM) and selects the skip current level in low consumption mode (LCM). |+| 5 | FSW | input | A pull-up resistor (E24 series) to VCC or pull-down to GND selects the switching frequency, and pinstrapping is active only before the soft-start phase. |+| 6 | MLF | input | A pull-up resistor (E24 series) to VCC or pull-down to GND selects low noise mode or low consumption mode and the active RST threshold, and pinstrapping is active only before the soft-start phase. |+| 7 | COMP | passive | Output of the error amplifier, to which the compensation network is connected (absolute max -0.3 V to VCC + 0.3 V). |+| 8 | DELAY | passive | An external capacitor on this pin sets the time DELAY before the RST output is released after the output exceeds the reset threshold; if left floating, RST behaves like a Power Good signal. |+| 9 | FB | input | Inverting input of the error amplifier, with a voltage feedback reference of 0.841 V to 0.859 V (0.85 V typ.). |+| 10 | SGND | power_in | Signal ground, which must be connected to the exposed pad. |+| 11 | PGND | power_in | Power ground, which must be connected to the exposed pad. |+| 12 | PGND | power_in | Power ground, which must be connected to the exposed pad. |+| 13 | LX | output | Switching node; absolute maximum range is -0.3 V to VIN + 0.3 V and high-side/low-side switch current is limited to 2 A. |+| 14 | LX | output | Switching node; absolute maximum range is -0.3 V to VIN + 0.3 V and high-side/low-side switch current is limited to 2 A. |+| 15 | VIN | power_in | DC input voltage, operating range 4 V to 38 V (absolute maximum 40 V). |+| 16 | VBIAS | power_in | Typically connected to the regulated output voltage; an external voltage reference can supply part of the analog circuitry to improve light-load efficiency, and it must be connected to GND if not used. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | HTSSOP-16-EP |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `L6986F`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)+- 3D model files: `l6986f-etched.step` / `l6986f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l6986f.step` / `l6986f.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588950764920180736) (64 pp, sha256 `2773d92112882ade`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l6986f-datasheet.pdf)
page.jsonadded+255@@ -0,0 +1,255 @@+{+ "slug": "l6986f",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "l6986f",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "l6986f.kicad_sym",+ "l6986f.kicad_mod",+ "l6986f.glb",+ "l6986f.step",+ "l6986f.lbr",+ "docs/hero.png",+ "docs/l6986f-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "l6986f-hero.glb",+ "l6986f-hero.overlay.json"+ ],+ "component": {+ "mpn": "L6986F",+ "manufacturer": "STMicroelectronics",+ "package": "HTSSOP-16-EP",+ "pin_count": 17,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588950764920180736",+ "parts": {+ "symbol": "l6986f.kicad_sym",+ "footprint": "l6986f.kicad_mod",+ "model_3d": "l6986f-hero.glb",+ "model_3d_plain": "l6986f.glb",+ "model_3d_step": "l6986f-etched.step",+ "model_3d_step_plain": "l6986f.step",+ "lbr": "l6986f.lbr"+ },+ "distributor_links": {+ "lcsc": "C1355602",+ "digikey": "497-19131-ND",+ "mouser": "511-L6986F"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T23:24:08Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-19131-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-L6986F",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "RST",+ "type": "output",+ "description": "RST open-collector output is driven low when the output voltage is out of regulation and is released after an adjustable DELAY time once the output is above the active delay threshold."+ },+ {+ "number": "2",+ "name": "VCC",+ "type": "power_out",+ "description": "Ceramic capacitor (≥ 470 nF) must be connected to filter the internal voltage reference, and this LDO pin supplies the embedded analog circuitry (VCC LDO output 2.9 V to 3.6 V, 3.3 V typ.)."+ },+ {+ "number": "3",+ "name": "SS/INH",+ "type": "bidirectional",+ "description": "An open-collector stage can disable the device when this pin is clamped to GND (INH mode), and an internal current generator (4 µA typ.) charges the external capacitor to implement soft-start."+ },+ {+ "number": "4",+ "name": "SYNCH/ISKP",+ "type": "input",+ "description": "This pin provides master/slave synchronization in low noise mode (LNM) and selects the skip current level in low consumption mode (LCM)."+ },+ {+ "number": "5",+ "name": "FSW",+ "type": "input",+ "description": "A pull-up resistor (E24 series) to VCC or pull-down to GND selects the switching frequency, and pinstrapping is active only before the soft-start phase."+ },+ {+ "number": "6",+ "name": "MLF",+ "type": "input",+ "description": "A pull-up resistor (E24 series) to VCC or pull-down to GND selects low noise mode or low consumption mode and the active RST threshold, and pinstrapping is active only before the soft-start phase."+ },+ {+ "number": "7",+ "name": "COMP",+ "type": "passive",+ "description": "Output of the error amplifier, to which the compensation network is connected (absolute max -0.3 V to VCC + 0.3 V)."+ },+ {+ "number": "8",+ "name": "DELAY",+ "type": "passive",+ "description": "An external capacitor on this pin sets the time DELAY before the RST output is released after the output exceeds the reset threshold; if left floating, RST behaves like a Power Good signal."+ },+ {+ "number": "9",+ "name": "FB",+ "type": "input",+ "description": "Inverting input of the error amplifier, with a voltage feedback reference of 0.841 V to 0.859 V (0.85 V typ.)."+ },+ {+ "number": "10",+ "name": "SGND",+ "type": "power_in",+ "description": "Signal ground, which must be connected to the exposed pad."+ },+ {+ "number": "11",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground, which must be connected to the exposed pad."+ },+ {+ "number": "12",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground, which must be connected to the exposed pad."+ },+ {+ "number": "13",+ "name": "LX",+ "type": "output",+ "description": "Switching node; absolute maximum range is -0.3 V to VIN + 0.3 V and high-side/low-side switch current is limited to 2 A."+ },+ {+ "number": "14",+ "name": "LX",+ "type": "output",+ "description": "Switching node; absolute maximum range is -0.3 V to VIN + 0.3 V and high-side/low-side switch current is limited to 2 A."+ },+ {+ "number": "15",+ "name": "VIN",+ "type": "power_in",+ "description": "DC input voltage, operating range 4 V to 38 V (absolute maximum 40 V)."+ },+ {+ "number": "16",+ "name": "VBIAS",+ "type": "power_in",+ "description": "Typically connected to the regulated output voltage; an external voltage reference can supply part of the analog circuitry to improve light-load efficiency, and it must be connected to GND if not used."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed pad (E.P.) is not a numbered pin and is not listed in the pin table; the datasheet only ; Table 1 prints the SS/INH soft-start current as '4 A typ.', which is almost certainly a lost micro s; Pin 12 and 13/14 (PGND, LX) and pin 16 (VBIAS) descriptions span the page 5/6 break in Table 1; pin ",+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 11,+ "cost_usd": 0.0561,+ "at": "2026-10-07T23:23:49"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588950764920180736",+ "pages": 64,+ "sha256": "2773d92112882ade",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "l6986f.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "l6986f-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "0a77b87aef2239479852cfb2a68b38033d1564f1909330344b78a4cf47a67ebc",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}