component
L6699DTR
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# L6699DTR++**STMicroelectronics** · AC-DC Controllers And Regulators · SO-16++L6699DTR from STMicroelectronics, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CSS | passive | Soft-start capacitor and resistor connection to GND; sets initial oscillator frequency and soft-start time constant; discharged by internal switch on overcurrent (ISEN > 0.8V), capacitive-mode operation, or device shutdown. |+| 2 | DELAY | passive | Delayed shutdown capacitor and resistor connection to GND; capacitor charged by 350µA pulses on overcurrent and slowly discharged by external resistor; IC stops switching when voltage reaches 3.5V and restarts when it drops below 0.3V. |+| 3 | CF | passive | Oscillator timing capacitor connected to GND; charged and discharged by internal current generators to determine switching frequency of converter. |+| 4 | RFmin | output | Minimum oscillator frequency 2V reference output; external resistor to GND sets current for minimum frequency; maximum frequency set by phototransistor resistor; recommended maximum initial operating frequency below 300kHz. |+| 5 | STBY | input | Burst-mode threshold input sensing feedback-related voltage; compared to 1.26V internal reference; IC enters idle state when voltage below threshold and restarts when exceeding reference by 30mV. |+| 6 | ISEN | input | Current sense input from sense resistor or capacitive divider; 0.8V threshold triggers soft-start capacitor discharge for frequency increase; 1.5V threshold causes immediate shutdown with restart delay; used for capacitive-mode detection and hard-switching prevention. |+| 7 | LINE | input | Line sensing input for brownout protection via resistor divider to high voltage input; voltage below 1.25V threshold shuts down IC and discharges soft-start capacitor; includes 13µA current hysteresis; internally clamped by Zener; bypass with capacitor to GND. |+| 8 | DIS | input | Latched device shutdown input; voltage exceeding 1.85V shuts down IC and reduces consumption; latch is latched until VCC falls below UVLO threshold; used for OTP and OVP protection. |+| 9 | PFC_STOP | tri_state | Open-drain ON/OFF control output for PFC controller; pulled low when IC is shut down by DIS >1.85V, ISEN >1.5V, STBY <1.25V, or DELAY >2V; open during UVLO. |+| 10 | GND | power_in | Chip ground; current return for low-side gate-drive and IC bias current; all ground connections of bias components should tie to track connected to this pin separately from pulsed current return. |+| 11 | LVG | output | Low-side gate-drive output; capable of 0.3A minimum source and 0.8A minimum sink peak current to drive lower MOSFET of half-bridge leg; actively pulled to GND during UVLO. |+| 12 | VCC | power_in | IC supply voltage (operating range 8.85-16V after turn-on) for signal part and low-side gate driver; bypass with 0.1µF typical capacitor to GND for clean bias voltage. |+| 13 | N.C. | unconnected | High voltage spacer; not internally connected; isolates high voltage pin and eases compliance with safety regulations for creepage distance on PCB. |+| 14 | OUT | power_in | High-side gate-drive floating ground; current return for high-side gate-drive current; connection must be carefully laid out to avoid excessive spikes below ground. |+| 15 | HVG | output | High-side floating gate-drive output; capable of 0.3A minimum source and 0.8A minimum sink peak current to drive upper MOSFET of half-bridge leg; internally pulled to OUT via resistor to prevent floating during UVLO. |+| 16 | VBOOT | power_in | High-side gate-drive floating supply voltage (operating range -1 to 618V relative to OUT); bootstrap capacitor connected between this pin and OUT pin 14; fed by internal synchronous bootstrap diode driven in-phase with low-side gate-drive. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SO-16 |+| Category | Power Management (PMIC) |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `L6699DTR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SO-16 (KiCad packages3D, STEP)+- 3D model files: `l6699dtr-etched.step` / `l6699dtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l6699dtr.step` / `l6699dtr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588932920745086976) (38 pp, sha256 `74d555a5bc88632e`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l6699dtr-datasheet.pdf)
page.jsonadded+206@@ -0,0 +1,206 @@+{+ "slug": "l6699dtr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics AC-DC Controllers And Regulators, SO-16. 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sets initial oscillator frequency and soft-start time constant; discharged by internal switch on overcurrent (ISEN > 0.8V), capacitive-mode operation, or device shutdown."+ },+ {+ "number": "2",+ "name": "DELAY",+ "type": "passive",+ "description": "Delayed shutdown capacitor and resistor connection to GND; capacitor charged by 350µA pulses on overcurrent and slowly discharged by external resistor; IC stops switching when voltage reaches 3.5V and restarts when it drops below 0.3V."+ },+ {+ "number": "3",+ "name": "CF",+ "type": "passive",+ "description": "Oscillator timing capacitor connected to GND; charged and discharged by internal current generators to determine switching frequency of converter."+ },+ {+ "number": "4",+ "name": "RFmin",+ "type": "output",+ "description": "Minimum oscillator frequency 2V reference output; external resistor to GND sets current for minimum frequency; maximum frequency set by phototransistor resistor; recommended maximum initial operating frequency below 300kHz."+ },+ {+ "number": "5",+ "name": "STBY",+ "type": "input",+ "description": "Burst-mode threshold input sensing feedback-related voltage; compared to 1.26V internal reference; IC enters idle state when voltage below threshold and restarts when exceeding reference by 30mV."+ },+ {+ "number": "6",+ "name": "ISEN",+ "type": "input",+ "description": "Current sense input from sense resistor or capacitive divider; 0.8V threshold triggers soft-start capacitor discharge for frequency increase; 1.5V threshold causes immediate shutdown with restart delay; used for capacitive-mode detection and hard-switching prevention."+ },+ {+ "number": "7",+ "name": "LINE",+ "type": "input",+ "description": "Line sensing input for brownout protection via resistor divider to high voltage input; voltage below 1.25V threshold shuts down IC and discharges soft-start capacitor; includes 13µA current hysteresis; internally clamped by Zener; bypass with capacitor to GND."+ },+ {+ "number": "8",+ "name": "DIS",+ "type": "input",+ "description": "Latched device shutdown input; voltage exceeding 1.85V shuts down IC and reduces consumption; latch is latched until VCC falls below UVLO threshold; used for OTP and OVP protection."+ },+ {+ "number": "9",+ "name": "PFC_STOP",+ "type": "tri_state",+ "description": "Open-drain ON/OFF control output for PFC controller; pulled low when IC is shut down by DIS >1.85V, ISEN >1.5V, STBY <1.25V, or DELAY >2V; open during UVLO."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Chip ground; current return for low-side gate-drive and IC bias current; all ground connections of bias components should tie to track connected to this pin separately from pulsed current return."+ },+ {+ "number": "11",+ "name": "LVG",+ "type": "output",+ "description": "Low-side gate-drive output; capable of 0.3A minimum source and 0.8A minimum sink peak current to drive lower MOSFET of half-bridge leg; actively pulled to GND during UVLO."+ },+ {+ "number": "12",+ "name": "VCC",+ "type": "power_in",+ "description": "IC supply voltage (operating range 8.85-16V after turn-on) for signal part and low-side gate driver; bypass with 0.1µF typical capacitor to GND for clean bias voltage."+ },+ {+ "number": "13",+ "name": "N.C.",+ "type": "unconnected",+ "description": "High voltage spacer; not internally connected; isolates high voltage pin and eases compliance with safety regulations for creepage distance on PCB."+ },+ {+ "number": "14",+ "name": "OUT",+ "type": "power_in",+ "description": "High-side gate-drive floating ground; current return for high-side gate-drive current; connection must be carefully laid out to avoid excessive spikes below ground."+ },+ {+ "number": "15",+ "name": "HVG",+ "type": "output",+ "description": "High-side floating gate-drive output; capable of 0.3A minimum source and 0.8A minimum sink peak current to drive upper MOSFET of half-bridge leg; internally pulled to OUT via resistor to prevent floating during UVLO."+ },+ {+ "number": "16",+ "name": "VBOOT",+ "type": "power_in",+ "description": "High-side gate-drive floating supply voltage (operating range -1 to 618V relative to OUT); bootstrap capacitor connected between this pin and OUT pin 14; fed by internal synchronous bootstrap diode driven in-phase with low-side gate-drive."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 12,+ "cost_usd": 0.0946,+ "at": "2026-10-03T04:20:22"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588932920745086976",+ "pages": 38,+ "sha256": "74d555a5bc88632e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}