L6599ATDTR

{
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  "type": "component",
  "slug": "l6599atdtr",
  "title": "L6599ATDTR",
  "brief": "STMicroelectronics Supervisor and Reset ICs, SO-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "pmic",
    "l6599atdtr"
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  "component": {
    "mpn": "L6599ATDTR",
    "manufacturer": "STMicroelectronics",
    "package": "SO-16",
    "pin_count": 16,
    "category": "PMIC",
    "subcategory": "Supervisor and Reset ICs",
    "datasheet": "https://www.st.com/resource/en/datasheet/l6599atdtr.pdf",
    "parts": {
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      "footprint": "l6599atdtr.kicad_mod",
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      "lbr": "l6599atdtr.lbr"
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    "distributor_links": {
      "lcsc": "C726096"
    },
    "pins": [
      {
        "number": "1",
        "name": "Css",
        "type": "input",
        "description": "Soft-start pin. External capacitor to GND plus resistor to RFmin sets the maximum oscillator frequency and the time constant for the frequency-shift soft-start ramp. Internally discharged on shutdown or when ISEN exceeds 0.8 V."
      },
      {
        "number": "2",
        "name": "DELAY",
        "type": "input",
        "description": "Delayed shutdown on overcurrent. RC network to GND sets max duration of an overcurrent condition before switching stops (charged by internal 150 uA source when ISEN>0.8V). Above 2 V forces Css discharge; above 3.5 V stops switching; restarts as pin drops below 0.3 V."
      },
      {
        "number": "3",
        "name": "CF",
        "type": "passive",
        "description": "Oscillator timing capacitor. Capacitor to GND is charged/discharged by internal current generators programmed by the RFmin network, setting the converter switching frequency."
      },
      {
        "number": "4",
        "name": "RFmin",
        "type": "output",
        "description": "Minimum oscillator frequency setting. Provides a precise 2 V reference; resistor from this pin to GND defines the current setting the minimum switching frequency. Optocoupler phototransistor connected here modulates frequency for feedback control."
      },
      {
        "number": "5",
        "name": "STBY",
        "type": "input",
        "description": "Burst-mode threshold. Compared to internal 1.24 V reference; below the reference IC enters idle (burst) mode with reduced quiescent current, restarts when pin exceeds 1.29 V. Tie to RFmin if burst mode is not used."
      },
      {
        "number": "6",
        "name": "ISEN",
        "type": "input",
        "description": "Current sense input for primary current (sense resistor or capacitive divider). Above 0.8 V threshold (50 mV hysteresis) Css is internally discharged (frequency-shift OCP). Above 1.5 V latches the device off. Tie to GND if unused."
      },
      {
        "number": "7",
        "name": "LINE",
        "type": "input",
        "description": "Line sensing input for AC or DC (post-PFC) brownout protection via resistor divider from HV bus. Below 1.24 V shuts down (not latched) IC; 13 uA current hysteresis source. Internal Zener clamp; Zener conduction also shuts IC down. Bias between 1.24 and 6 V if unused."
      },
      {
        "number": "8",
        "name": "DIS",
        "type": "input",
        "description": "Latched device shutdown. When voltage exceeds 1.85 V the IC is latched off; latch clears only when Vcc drops below UVLO. Useful for OTP/OVP implementation. Tie to GND if unused."
      },
      {
        "number": "9",
        "name": "PFC_STOP",
        "type": "output",
        "description": "Open-drain ON/OFF control of the PFC controller. Pulled low when the IC is shut down (DIS>1.85V, ISEN>1.5V, LINE>6V, STBY<1.24V) or when DELAY>2V; releases when DELAY falls below 0.3 V. Open during UVLO. Leave unconnected if unused."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Chip ground. Current return for both the low-side gate-drive current and IC bias current. Keep bias-component ground track separate from pulsed switching currents."
      },
      {
        "number": "11",
        "name": "LVG",
        "type": "output",
        "description": "Low-side gate-drive output for the lower MOSFET of the half-bridge. Capable of 0.3 A min. source / 0.7 A min. sink peak current. Actively pulled to GND during UVLO."
      },
      {
        "number": "12",
        "name": "Vcc",
        "type": "power_in",
        "description": "Supply voltage for the IC signal section and the low-side gate driver. Operating range 8.85 to 16 V, VccOn ~10.7 V, VccOff ~8.15 V; internal clamp at ~17 V. A small 0.1 uF bypass to GND is recommended."
      },
      {
        "number": "13",
        "name": "N.C.",
        "type": "unconnected",
        "description": "No connection. High-voltage spacer pin left unconnected internally to increase creepage distance between the low-voltage side and the high-voltage floating pins (14-16)."
      },
      {
        "number": "14",
        "name": "OUT",
        "type": "power_in",
        "description": "High-side gate-drive floating ground (half-bridge midpoint). Current return for the high-side gate driver; connect carefully to avoid large negative spikes. Max slew rate 50 V/ns; up to 600 V floating operation."
      },
      {
        "number": "15",
        "name": "HVG",
        "type": "output",
        "description": "High-side floating gate-drive output for the upper MOSFET of the half-bridge. 0.3 A min. source / 0.7 A min. sink peak drive; internal resistor to OUT keeps pin non-floating during UVLO."
      },
      {
        "number": "16",
        "name": "VBOOT",
        "type": "power_in",
        "description": "High-side gate-drive floating supply (bootstrap rail). Bootstrap capacitor between VBOOT and OUT is refreshed via an internal synchronous bootstrap DMOS driven in-phase with LVG. Rated up to 618 V absolute maximum with respect to GND."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.st.com/resource/en/datasheet/l6599atdtr.pdf",
        "pages": 32,
        "sha256": "1e1f355db14cc0ab",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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    "pin1": {
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      "at": [
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      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
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        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
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        "zmin_mm": 0,
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        "checked": "2026-10-07",
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    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "STMicroelectronics",
      "Package": "SO-16",
      "Category": "PMIC",
      "Pins": "16"
    }
  },
  "sections": [
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  "discovery_triggers": [
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  "discovery_pitch": "L6599ATDTR (STMicroelectronics) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
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  "variants": [
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      "mpn": "L6599ATDTR",
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  "updated_at": "2026-09-24T23:29:44.605Z"
}