# L6571BD

**STMicroelectronics** · Gate Drivers · SOIC-8

L6571BD from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VS | power_in | Supply input with an internal zener clamp of 15.6 V typical (14.6 V to 16.6 V at IS = 5 mA), recommended VS range 10 V to VCL, and the circuit should not be driven from a DC low-impedance source. |
| 2 | RF | output | Oscillator timing resistor pin, driven by a buffer that alternates between VS and GND to supply current to the external resistor RF between pins 2 and 3, and it can also drive another L6569/71 IC. |
| 3 | CF | bidirectional | Oscillator timing capacitor pin that sets the oscillation frequency together with RF, and that can alternatively receive an external logic signal to drive the IC. |
| 4 | GND | power_in | Ground reference for the device; the internal zener clamp is connected between GND and VS. |
| 5 | LVG | output | Low side driver output that delivers 170 mA source and 270 mA sink (typical values). |
| 6 | OUT | power_in | Upper driver floating reference (high side switch source output), with an absolute maximum range of -1 V to VBOOT - 18 V and a leakage of 5 µA maximum at VOUT = 562 V. |
| 7 | HVG | output | High side driver output that delivers 170 mA source and 270 mA sink (typical values). |
| 8 | BOOT | power_in | Bootstrap floating upper driver supply, with a recommended maximum of 500 V and an absolute maximum of 618 V; ESD immunity on pins 6, 7 and 8 is 900 V (HBM). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `L6571BD`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `l6571bd-etched.step` / `l6571bd-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l6571bd.step` / `l6571bd.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589035259556212736) (12 pp, sha256 `7ffa13798fc34909`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/l6571bd-datasheet.pdf)