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Name	Last commit message	Last updated
docs	l6565dtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
viewers	l6565dtr: viewers · Ray	1mo ago
l6565dtr-etched.fit.json	l6565dtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
l6565dtr-etched.glb	l6565dtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
l6565dtr-etched.step	l6565dtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
l6565dtr.glb	Publish 0.1.0 · Ray	1mo ago
l6565dtr.kicad_mod	Publish 0.1.0 · Ray	1mo ago
l6565dtr.kicad_sym	Publish 0.1.0 · Ray	1mo ago
l6565dtr.lbr	Publish 0.1.0 · Ray	1mo ago
l6565dtr.step	Publish 0.1.0 · Ray	1mo ago
package.json	l6565dtr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	1mo ago
page.json	l6565dtr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	1mo ago
README.md	Initial commit: component/l6565dtr · Ray	1mo ago

L6565DTR

STMicroelectronics · AC-DC Controllers And Regulators · SOIC-8

L6565DTR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	INV	input	Inverting input of error amplifier for voltage feedback regulation via resistor divider or optocoupler; voltage range -0.3 to 7V.
2	COMP	output	Output of error amplifier for compensation network and PWM modulation control; voltage range -0.3 to 7V with upper clamp 5 to 5.5V and lower clamp 2.25 to 2.55V.
3	VFF	input	Line voltage feedforward input for adjusting current limitation setpoint via resistor divider; operating range 0 to 3V; ground pin to disable function and set maximum setpoint.
4	CS	input	Current sense input to PWM comparator; voltage range -0.3 to 7V; exceeding 2V threshold disables gate driver for hiccup-mode overcurrent protection.
5	ZCD	input	Transformer demagnetization or external synchronization input; negative-going edge below 1.6V triggers MOSFET turn-on after 2.1V positive arming threshold; blanked minimum 3.5µs after MOSFET turn-off; pull below 150mV to disable IC.
6	GND	power_in	Ground; current return for signal part of IC and gate driver circuits.
7	GD	output	Gate driver output with totem-pole stage; ±400mA peak source and sink current capability to drive MOSFETs and IGBTs; internal UVLO pull-down holds output low during UVLO.
8	Vcc	power_in	Supply voltage for signal circuits and gate driver; operating range 10.3 to 18V after turn-on with turn-on threshold 12.5 to 14.5V and turn-off threshold 8.7 to 10.3V.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SOIC-8
Category	Power Management (PMIC)
Pins	8

CAD (KiCad official)

Symbol: L6565DTR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: l6565dtr-etched.step / l6565dtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l6565dtr.step / l6565dtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (17 pp, sha256 82463efb68b50ab1, retrieved 2026-09-18, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF