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L6563
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STMicroelectronics AC-DC Controllers And Regulators, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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L6563
STMicroelectronics · AC-DC Controllers And Regulators · SOIC-14
L6563 from STMicroelectronics, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INV | input | Inverting input of the error amplifier, fed from the PFC output voltage through a resistor divider, normally high impedance, and tracking boost activates an internal current sink programmed by TBO (pin 6) when used. |
| 2 | COMP | output | Output of the error amplifier, which requires a compensation network between this pin and INV (pin 1) for voltage loop stability and high power factor with low THD. |
| 3 | MULT | input | Main multiplier input connected to the rectified mains through a resistor divider, providing the sinusoidal current-loop reference and RMS mains information, with a linear operation range of 0 to 3 V. |
| 4 | CS | input | Input to the PWM comparator sensing MOSFET current through a resistor, and on the L6563 a second comparison at 1.7 V detects abnormal current (e.g. boost inductor saturation), shuts down the IC and asserts PWM_LATCH high (this function is not present in the L6563A). |
| 5 | VFF | input | Second multiplier input for the 1/V² function, which requires a capacitor and parallel resistor from the pin to GND, and the pin must never be connected directly to GND. |
| 6 | TBO | output | Tracking boost pin providing a buffered VFF voltage, where a resistor to GND defines the current sunk from INV (pin 1) to make the output voltage track the mains, and it is left open if the function is not used. |
| 7 | PFC_OK | input | PFC pre-regulator output voltage monitoring/disable input: above 2.5 V the IC shuts down with a latched condition and PWM_LATCH asserted, below 0.2 V it shuts down until the voltage rises above 0.26 V, and it should be tied to a voltage between 0.26 V and 2.5 V if unused. |
| 8 | PWM_LATCH | output | Fault signaling output that is asserted high when PFC_OK exceeds 2.5 V or (L6563 only) CS exceeds 1.7 V, normally used to latch-disable the DC-DC converter's PWM controller, and left floating if not used. |
| 9 | PWM_STOP | output | Fault signaling output that is pulled to ground when the IC is disabled by RUN below 0.5 V, normally used to temporarily disable the DC-DC converter's PWM controller, and left floating if not used. |
| 10 | RUN | input | Remote ON/OFF input where a voltage below 0.52 V shuts the IC down (not latched) and it restarts above 0.6 V, and it can be connected to VFF for brownout protection or to INV if the function is not used. |
| 11 | ZCD | input | Boost inductor demagnetization sensing input for transition-mode operation, where a negative-going edge triggers MOSFET turn-on. |
| 12 | GND | power_in | Ground, serving as the current return for both the signal part of the IC and the gate driver. |
| 13 | GD | output | Gate driver totem-pole output for power MOSFETs and IGBTs with 600 mA source and 800 mA sink peak current, with the high-level voltage clamped at about 12 V. |
| 14 | VCC | power_in | Supply voltage for both the signal part of the IC and the gate driver, with an operating range of 10.3 V to 22 V after turn-on. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
L6563 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
l6563-etched.step/l6563-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);l6563.step/l6563.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (39 pp, sha256
867a46c1733f77b9, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# L6563
**STMicroelectronics** · AC-DC Controllers And Regulators · SOIC-14
L6563 from STMicroelectronics, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INV | input | Inverting input of the error amplifier, fed from the PFC output voltage through a resistor divider, normally high impedance, and tracking boost activates an internal current sink programmed by TBO (pin 6) when used. |
| 2 | COMP | output | Output of the error amplifier, which requires a compensation network between this pin and INV (pin 1) for voltage loop stability and high power factor with low THD. |
| 3 | MULT | input | Main multiplier input connected to the rectified mains through a resistor divider, providing the sinusoidal current-loop reference and RMS mains information, with a linear operation range of 0 to 3 V. |
| 4 | CS | input | Input to the PWM comparator sensing MOSFET current through a resistor, and on the L6563 a second comparison at 1.7 V detects abnormal current (e.g. boost inductor saturation), shuts down the IC and asserts PWM_LATCH high (this function is not present in the L6563A). |
| 5 | VFF | input | Second multiplier input for the 1/V² function, which requires a capacitor and parallel resistor from the pin to GND, and the pin must never be connected directly to GND. |
| 6 | TBO | output | Tracking boost pin providing a buffered VFF voltage, where a resistor to GND defines the current sunk from INV (pin 1) to make the output voltage track the mains, and it is left open if the function is not used. |
| 7 | PFC_OK | input | PFC pre-regulator output voltage monitoring/disable input: above 2.5 V the IC shuts down with a latched condition and PWM_LATCH asserted, below 0.2 V it shuts down until the voltage rises above 0.26 V, and it should be tied to a voltage between 0.26 V and 2.5 V if unused. |
| 8 | PWM_LATCH | output | Fault signaling output that is asserted high when PFC_OK exceeds 2.5 V or (L6563 only) CS exceeds 1.7 V, normally used to latch-disable the DC-DC converter's PWM controller, and left floating if not used. |
| 9 | PWM_STOP | output | Fault signaling output that is pulled to ground when the IC is disabled by RUN below 0.5 V, normally used to temporarily disable the DC-DC converter's PWM controller, and left floating if not used. |
| 10 | RUN | input | Remote ON/OFF input where a voltage below 0.52 V shuts the IC down (not latched) and it restarts above 0.6 V, and it can be connected to VFF for brownout protection or to INV if the function is not used. |
| 11 | ZCD | input | Boost inductor demagnetization sensing input for transition-mode operation, where a negative-going edge triggers MOSFET turn-on. |
| 12 | GND | power_in | Ground, serving as the current return for both the signal part of the IC and the gate driver. |
| 13 | GD | output | Gate driver totem-pole output for power MOSFETs and IGBTs with 600 mA source and 800 mA sink peak current, with the high-level voltage clamped at about 12 V. |
| 14 | VCC | power_in | Supply voltage for both the signal part of the IC and the gate driver, with an operating range of 10.3 V to 22 V after turn-on. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `L6563`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `l6563-etched.step` / `l6563-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l6563.step` / `l6563.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590455834179641344) (39 pp, sha256 `867a46c1733f77b9`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/l6563-datasheet.pdf)