component
L5991AD
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# L5991AD++**STMicroelectronics** · AC-DC Controllers And Regulators · SOIC-16++L5991AD from STMicroelectronics, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SYNC | bidirectional | Synchronization pin operating as clock output in master mode (7mA typical source capability, 4V amplitude) or edge-triggered slave input for external frequency synchronization. |+| 2 | RCT | bidirectional | Oscillator timing node connected to external RC network for frequency control; internal circuit charges and discharges timing capacitor between 1V valley and 3V peak. |+| 3 | DC | input | Duty cycle control input; voltage 1-3V sets maximum duty cycle between 0% and upper limit Dx, <1V inhibits output, floating or >3V selects maximum. |+| 4 | VREF | power_out | 5.0V±1.5% reference voltage output (0.4mV/°C temperature coefficient, 2mV line regulation, 2mV load regulation at 1-10mA output current). |+| 5 | VFB | input | Error amplifier inverting input for feedback signal; compared to internal 2.5V reference with 60-90dB open-loop gain and 1.7-4MHz unity-gain bandwidth. |+| 6 | COMP | output | Error amplifier output for frequency compensation network connection; voltage monitored for standby frequency reduction at light load. |+| 7 | SS | output | Soft-start control pin; external capacitor charged by 14-26µA current source (at 25°C) ramping to 7V clamp voltage for smooth power-up. |+| 8 | VCC | power_in | Signal circuit supply; 7.8-9V startup threshold (L5991A) with 7-8.2V minimum operating voltage (L5991A) and internal 25V zener clamp. |+| 9 | VC | power_in | Power stage driver supply that absorbs pulsed current when driving external switch gate; buffer capacitor recommended near IC. |+| 10 | OUT | output | Totem-pole driver output to external power switch; 1.6A peak source (NPN Darlington), 2A peak sink (VDMOS), 13V internal gate clamp, 20-100ns rise/fall time. |+| 11 | PGND | power_in | Power ground; return path for pulsed gate drive current loop to external switch. |+| 12 | SGND | power_in | Signal ground; reference point for all control circuitry and external control signal returns. |+| 13 | ISEN | input | Current sense input from external resistor hot lead; 100ns internal leading-edge blanking, 1.1-1.3V fault threshold, 2.85-3.15V/V transfer gain. |+| 14 | DIS | input | Device disable control input; threshold >2.5V triggers shutdown with restart requiring VCC below UVLO, must be tied to SGND if unused. |+| 15 | DC-LIM | input | Duty cycle limit control; connection to VREF sets maximum duty cycle to approximately 50%, floating or grounded allows full maximum duty cycle. |+| 16 | ST-BY | input | Standby mode control input; resistor RB to RCT pin sets normal frequency (fosc), connect to VREF or leave floating to enable light-load mode (<13% rated power). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SOIC-16 |+| Category | Power Management (PMIC) |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `L5991AD`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `l5991ad-etched.step` / `l5991ad-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l5991ad.step` / `l5991ad.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586194053762830336) (19 pp, sha256 `a0e39653f17acfa3`, retrieved 2026-10-05, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l5991ad-datasheet.pdf)
page.jsonadded+208@@ -0,0 +1,208 @@+{+ "slug": "l5991ad",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics AC-DC Controllers And Regulators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "l5991ad",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "l5991ad.kicad_sym",+ "l5991ad.kicad_mod",+ "l5991ad.glb",+ "l5991ad.step",+ "l5991ad.lbr",+ "docs/hero.png",+ "docs/l5991ad-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "l5991ad-hero.glb",+ "l5991ad-hero.overlay.json"+ ],+ "component": {+ "mpn": "L5991AD",+ "manufacturer": "STMicroelectronics",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Power Management (PMIC)",+ "subcategory": "AC-DC Controllers And Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586194053762830336",+ "parts": {+ "symbol": "l5991ad.kicad_sym",+ "footprint": "l5991ad.kicad_mod",+ "model_3d": "l5991ad-hero.glb",+ "model_3d_plain": "l5991ad.glb",+ "model_3d_step": "l5991ad-etched.step",+ "model_3d_step_plain": "l5991ad.step",+ "lbr": "l5991ad.lbr"+ },+ "distributor_links": {+ "lcsc": 10655,+ "digikey": "497-L5991AD-ND",+ "mouser": "511-L5991AD"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T22:05:43Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-L5991AD-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-L5991AD",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SYNC",+ "type": "bidirectional",+ "description": "Synchronization pin operating as clock output in master mode (7mA typical source capability, 4V amplitude) or edge-triggered slave input for external frequency synchronization."+ },+ {+ "number": "2",+ "name": "RCT",+ "type": "bidirectional",+ "description": "Oscillator timing node connected to external RC network for frequency control; internal circuit charges and discharges timing capacitor between 1V valley and 3V peak."+ },+ {+ "number": "3",+ "name": "DC",+ "type": "input",+ "description": "Duty cycle control input; voltage 1-3V sets maximum duty cycle between 0% and upper limit Dx, <1V inhibits output, floating or >3V selects maximum."+ },+ {+ "number": "4",+ "name": "VREF",+ "type": "power_out",+ "description": "5.0V±1.5% reference voltage output (0.4mV/°C temperature coefficient, 2mV line regulation, 2mV load regulation at 1-10mA output current)."+ },+ {+ "number": "5",+ "name": "VFB",+ "type": "input",+ "description": "Error amplifier inverting input for feedback signal; compared to internal 2.5V reference with 60-90dB open-loop gain and 1.7-4MHz unity-gain bandwidth."+ },+ {+ "number": "6",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output for frequency compensation network connection; voltage monitored for standby frequency reduction at light load."+ },+ {+ "number": "7",+ "name": "SS",+ "type": "output",+ "description": "Soft-start control pin; external capacitor charged by 14-26µA current source (at 25°C) ramping to 7V clamp voltage for smooth power-up."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Signal circuit supply; 7.8-9V startup threshold (L5991A) with 7-8.2V minimum operating voltage (L5991A) and internal 25V zener clamp."+ },+ {+ "number": "9",+ "name": "VC",+ "type": "power_in",+ "description": "Power stage driver supply that absorbs pulsed current when driving external switch gate; buffer capacitor recommended near IC."+ },+ {+ "number": "10",+ "name": "OUT",+ "type": "output",+ "description": "Totem-pole driver output to external power switch; 1.6A peak source (NPN Darlington), 2A peak sink (VDMOS), 13V internal gate clamp, 20-100ns rise/fall time."+ },+ {+ "number": "11",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground; return path for pulsed gate drive current loop to external switch."+ },+ {+ "number": "12",+ "name": "SGND",+ "type": "power_in",+ "description": "Signal ground; reference point for all control circuitry and external control signal returns."+ },+ {+ "number": "13",+ "name": "ISEN",+ "type": "input",+ "description": "Current sense input from external resistor hot lead; 100ns internal leading-edge blanking, 1.1-1.3V fault threshold, 2.85-3.15V/V transfer gain."+ },+ {+ "number": "14",+ "name": "DIS",+ "type": "input",+ "description": "Device disable control input; threshold >2.5V triggers shutdown with restart requiring VCC below UVLO, must be tied to SGND if unused."+ },+ {+ "number": "15",+ "name": "DC-LIM",+ "type": "input",+ "description": "Duty cycle limit control; connection to VREF sets maximum duty cycle to approximately 50%, floating or grounded allows full maximum duty cycle."+ },+ {+ "number": "16",+ "name": "ST-BY",+ "type": "input",+ "description": "Standby mode control input; resistor RB to RCT pin sets normal frequency (fosc), connect to VREF or leave floating to enable light-load mode (<13% rated power)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: All pin specifications extracted from PIN FUNCTIONS table and PIN CONNECTION diagram on page 2 of da"+ ],+ "pages_sent": 19,+ "cost_usd": 0.1735,+ "at": "2026-10-05T22:05:26"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586194053762830336",+ "pages": 19,+ "sha256": "a0e39653f17acfa3",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}