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docs l5973adtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
viewers l5973adtr: viewers · Ray 28d ago
l5973adtr-etched.fit.json l5973adtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
l5973adtr-etched.glb l5973adtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
l5973adtr-etched.step l5973adtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
l5973adtr.glb Publish 0.1.0 · Ray 28d ago
l5973adtr.kicad_mod Publish 0.1.0 · Ray 28d ago
l5973adtr.kicad_sym Publish 0.1.0 · Ray 28d ago
l5973adtr.lbr Publish 0.1.0 · Ray 28d ago
l5973adtr.step Publish 0.1.0 · Ray 28d ago
package.json Publish 0.1.0 · Ray 28d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 12d ago
README.md l5973adtr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 18d ago

L5973ADTR

STMicroelectronics · DC-DC Converters · HSOP-8-EP

L5973ADTR from STMicroelectronics, in a HSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Regulator switch output. Internal P-channel D-MOS drain that drives the external inductor; source of the switching node (up to 2 A internal switch limit). Output DC voltage rated -1 V to 40 V.
2 SYNC bidirectional Master/slave synchronization pin. When open, provides an output signal synchronous with the turn-off of the internal power switch. When driven with an external clock higher than the internal 500 kHz, the device synchronizes to it. Tying the SYNC pins of two devices together makes the higher-frequency device the master. Absolute max ±0.3 V to 4 V.
3 INH input Active-high inhibit input. VINH > 2.2 V disables the device (standby); VINH < 0.8 V enables it. Has an internal pull-up, so if left open the device is disabled; if unused it must be tied to ground. Absolute max -0.3 V to VCC.
4 COMP output Error amplifier output, used for frequency loop compensation. Typical external network is an RC/CC series to GND (e.g. 4.7 kΩ + 22 nF with 220 pF in parallel).
5 FB input Step-down feedback input to the internal error amplifier (reference 1.235 V typ). Connect the output directly for VOUT = 1.235 V; use a resistor divider (with the lower resistor typically 4.7 kΩ) for higher output voltages up to 35 V. Absolute max 4 V.
6 VREF power_out Internal 3.3 V ±2% reference voltage output. No filter capacitor is required for stability. Absolute max 4 V.
7 GND power_in Device ground and power return. Exposed pad on the HSOP8 package should be connected to this ground plane for thermal dissipation (RthJA ≈ 40 °C/W).
8 VCC power_in Unregulated DC input supply for both the control circuitry and the internal power P-DMOS switch. Operating range 4 V to 36 V, absolute maximum 40 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package HSOP-8-EP
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • L5973ADTR

CAD (KiCad official)

  • Symbol: L5973ADTR
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: HSOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: l5973adtr-etched.step / l5973adtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l5973adtr.step / l5973adtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (22 pp, sha256 5657968dab13e305, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF