# L5970D

**STMicroelectronics** · DC-DC Converters · SOP-8

L5970D from STMicroelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | output | Regulator output; absolute maximum DC voltage is -1 to 40 V, output peak voltage is -5 to 40 V at t = 0.1µs, and output current is internally limited. |
| 2 | SYNC | bidirectional | Master/slave synchronization pin; absolute maximum voltage is -0.3 to 4 V, with a low input voltage of 0.74 V maximum and a high input voltage of 2.5 V minimum. |
| 3 | INH | input | Active-high logic inhibit that disables the device, with thresholds of 0.8 V for device ON and 2.2 V for device OFF; it must be grounded if unused and an internal pull-up disables the device when open. |
| 4 | COMP | passive | Error amplifier output used for frequency compensation. |
| 5 | FB | input | Feedback input; connecting it directly to this pin gives an output voltage of 1.23 V, and an external resistive divider is required for higher output voltages. |
| 6 | VREF | power_out | 3.3V reference voltage output; no capacitor is required for stability. |
| 7 | GND | power_in | Ground. |
| 8 | VCC | power_in | Unregulated DC input voltage; operating input range is 4.4 V to 36 V and absolute maximum input voltage is 40 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | V8 |  |  | 40 | V |  | 4 |
| Output DC voltage | V1 | -1 |  | 40 | V |  | 4 |
| Output peak voltage | V1 | -5 |  | 40 | V | t = 0.1µs | 4 |
| Analog pins | V4, V5 |  |  | 4 | V |  | 4 |
| INH voltage | V3 | -0.3 |  |  | V | up to VCC | 4 |
| SYNC voltage | V2 | -0.3 |  | 4 | V |  | 4 |
| Power dissipation | PTOT |  |  | 0.75 | W | TA ≤ 60°C | 4 |
| Operating junction temperature range | TJ | -40 |  | 150 | °C |  | 4 |
| Storage temperature range | TSTG | -55 |  | 150 | °C |  | 4 |
| Maximum thermal resistance junction-ambient | RthJA |  |  | 120 | °C/W | Package mounted on board | 4 |
| Operating input voltage range | VCC | 4.4 |  | 36 | V | Vo = 1.235V; Io = 2A | 5 |
| Mosfet on resistance | RDS(on) |  | 0.25 | 0.5 | Ω |  | 5 |
| Maximum limiting current | Il | 1.5 | 1.87 | 2.25 | A | VCC = 4.4V to 36V | 5 |
| Switching frequency | fs | 212 | 250 | 280 | KHz |  | 5 |
| Switching frequency | fs | 225 | 250 | 275 | KHz |  | 5 |
| Duty cycle |  | 0 |  | 100 | % |  | 5 |
| Voltage feedback | V5 | 1.22 | 1.235 | 1.25 | V | 4.4V < VCC < 36V, 20mA < IO < 2A | 5 |
| Voltage feedback | V5 | 1.198 | 1.235 | 1.272 | V |  | 5 |
| Total operating quiescent current | Iqop | 3 |  | 5 | mA |  | 5 |
| Total stand-by quiescent current | Iqst-by | 50 |  | 100 | µA | Vinh > 2.2V | 5 |
| Total stand-by quiescent current | Iqst-by | 80 |  | 150 | µA | VCC = 36V; Vinh > 2.2V | 5 |
| Inhibit INH threshold voltage device ON | INH |  |  | 0.8 | V | Device ON | 5 |
| Inhibit INH threshold voltage device OFF | INH | 2.2 |  |  | V | Device OFF | 5 |
| High level output voltage | VOH | 3.5 |  |  | V | VFB = 1V | 5 |
| Low level output voltage | VOL |  |  | 0.4 | V | VFB = 1.5V | 5 |
| Source output current | Io source | 200 |  | 300 | µA | VCOMP = 1.9V; VFB = 1V | 5 |
| Sink output current | Io sink | 1 |  | 1.5 | mA | VCOMP = 1.9V; VFB = 1.5V | 6 |
| Source bias current | Ib | 2.5 |  | 4 | µA |  | 6 |
| DC open loop gain |  | 50 |  | 65 | dB | RL = ∞ | 6 |
| High input voltage |  | 2.5 |  |  | V | VCC = 4.4V to 36V; upper limit VREF | 6 |
| Low input voltage |  |  |  | 0.74 | V | VCC = 4.4V to 36V | 6 |
| Slave sink current |  | 0.11 |  | 0.25 | mA | Vsync = 0.74V | 6 |
| Slave sink current |  | 0.21 |  | 0.45 | mA | Vsync = 2.33V | 6 |
| Master output amplitude |  | 2.75 | 3 |  | V | Isource = 3mA | 6 |
| Output pulse width |  | 0.2 |  | 0.35 | µs | no load, Vsync = 1.65V | 6 |
| Reference voltage | VREF | 3.234 | 3.3 | 3.366 | V | IREF = 0 to 5mA; VCC = 4.4V to 36V | 6 |
| Reference voltage | VREF | 3.2 | 3.3 | 3.399 | V | IREF = 0 to 5mA; VCC = 4.4V to 36V | 6 |
| Line regulation |  | 5 |  | 10 | mV | IREF = 0mA; VCC = 4.4V to 36V | 6 |
| Load regulation |  | 8 |  | 15 | mV | IREF = 0 to 5mA | 6 |
| Short circuit current |  | 10 | 18 | 30 | mA |  | 6 |

## CAD (KiCad official)

- Symbol: `L5970D`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `l5970d-etched.step` / `l5970d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l5970d.step` / `l5970d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/l5970d.pdf) (16 pp, sha256 `00b89541ee6ae2c8`, retrieved 2026-11-06, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/l5970d-datasheet.pdf)