component
L4949EDTR-E
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# L4949EDTR-E++**STMicroelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SO-8++L4949EDTR-E from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VS | power_in | Supply input voltage ranging from 5V to 28V; must be blocked to GND via external capacitor. |+| 2 | SI | input | Sense input for monitoring input voltage; connect via external voltage divider to VS and GND. |+| 3 | VZ | power_out | Preregulator output voltage stabilized to 5V with maximum output current of 10 µA. |+| 4 | CT | input | Reset pulse delay adjustment pin; connect external capacitor to GND to set delay time. |+| 5 | GND | power_in | Ground reference, common return path. |+| 6 | RES | output | Reset output (open-drain) pulled low when output voltage drops below 4.5V threshold. |+| 7 | SO | output | Sense output (open-drain) pulled low when sense input voltage drops below 1.23V threshold. |+| 8 | VOUT | power_out | Regulated output voltage nominally 5V with ±1% accuracy at 1 mA load; block to GND via external capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SO-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `L4949EDTR-E`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SO-8 (KiCad packages3D, STEP)+- 3D model files: `l4949edtr-e-etched.step` / `l4949edtr-e-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l4949edtr-e.step` / `l4949edtr-e.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588902666756243456) (19 pp, sha256 `eb565c8e521260c1`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/l4949edtr-e-datasheet.pdf)
page.jsonadded+159@@ -0,0 +1,159 @@+{+ "slug": "l4949edtr-e",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "l4949edtr-e",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "l4949edtr-e.kicad_sym",+ "l4949edtr-e.kicad_mod",+ "l4949edtr-e.glb",+ "l4949edtr-e.step",+ "l4949edtr-e.lbr",+ "docs/hero.png",+ "docs/l4949edtr-e-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "l4949edtr-e-hero.glb",+ "l4949edtr-e-hero.overlay.json"+ ],+ "component": {+ "mpn": "L4949EDTR-E",+ "manufacturer": "STMicroelectronics",+ "package": "SO-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588902666756243456",+ "parts": {+ "symbol": "l4949edtr-e.kicad_sym",+ "footprint": "l4949edtr-e.kicad_mod",+ "model_3d": "l4949edtr-e-hero.glb",+ "model_3d_plain": "l4949edtr-e.glb",+ "model_3d_step": "l4949edtr-e-etched.step",+ "model_3d_step_plain": "l4949edtr-e.step",+ "lbr": "l4949edtr-e.lbr"+ },+ "distributor_links": {+ "lcsc": 262890,+ "digikey": "497-13066-2-ND",+ "mouser": "511-L4949EDTR-E"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T09:30:48Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-13066-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-L4949EDTR-E",+ "status": "found",+ "lifecycle": "Not Recommended for New Designs"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VS",+ "type": "power_in",+ "description": "Supply input voltage ranging from 5V to 28V; must be blocked to GND via external capacitor."+ },+ {+ "number": "2",+ "name": "SI",+ "type": "input",+ "description": "Sense input for monitoring input voltage; connect via external voltage divider to VS and GND."+ },+ {+ "number": "3",+ "name": "VZ",+ "type": "power_out",+ "description": "Preregulator output voltage stabilized to 5V with maximum output current of 10 µA."+ },+ {+ "number": "4",+ "name": "CT",+ "type": "input",+ "description": "Reset pulse delay adjustment pin; connect external capacitor to GND to set delay time."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference, common return path."+ },+ {+ "number": "6",+ "name": "RES",+ "type": "output",+ "description": "Reset output (open-drain) pulled low when output voltage drops below 4.5V threshold."+ },+ {+ "number": "7",+ "name": "SO",+ "type": "output",+ "description": "Sense output (open-drain) pulled low when sense input voltage drops below 1.23V threshold."+ },+ {+ "number": "8",+ "name": "VOUT",+ "type": "power_out",+ "description": "Regulated output voltage nominally 5V with ±1% accuracy at 1 mA load; block to GND via external capacitor."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 19,+ "cost_usd": 0.0912,+ "at": "2026-10-03T09:30:24"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588902666756243456",+ "pages": 19,+ "sha256": "eb565c8e521260c1",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}