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Contents

README

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L4931CD50-TR

STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

L4931CD50-TR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated output voltage pin (5 V nominal for this order code); requires a 2.2 µF output capacitor for stability and supplies up to 250 mA.
2 GND power_in Ground reference pin.
3 GND power_in Ground reference pin.
4 NC unconnected Not internally connected pin.
5 INHIBIT input TTL-compatible logic control input for electronic shutdown; logic low (<0.8 V) enables OFF mode (typ. 50 µA quiescent current) and logic high (>2 V) enables ON mode.
6 GND power_in Ground reference pin.
7 GND power_in Ground reference pin.
8 VIN power_in DC input supply voltage pin, operating range up to 20 V, with 0.1 µF input capacitor recommended.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: L4931CD50-TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: l4931cd50-tr-etched.step / l4931cd50-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l4931cd50-tr.step / l4931cd50-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (32 pp, sha256 42bf56a6e95ed577, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF