L32AOC050000PBL

Lucki · Crystal Oscillators · SMD3225-4P

L32AOC050000PBL from Lucki, in a SMD3225-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	E/D	input	Enable/disable input: High or open enables the output at pin 3, Low puts pin 3 in high impedance, and Low combined with a floating pin is disallowed because pin 3 becomes unstable; VIH is 0.7VDD to VDD and VIL is 0V to 0.3VDD.
2	GND	power_in	Ground return for the oscillator; a 0.01uF bypass capacitor should be placed between VDD (pin 4) and this GND pin to minimize power supply line noise.
3	Output	output	HCMOS clock output at 50.000 MHz, active when pin 1 is High or open, with the advised load limited to 15 pF (driving only one CMOS/TTL gate).
4	VDD	power_in	Supply voltage of 3.3 V ±10%, to be decoupled to GND (pin 2) with a 0.01uF bypass capacitor.

Key specifications

Parameter	Value
Manufacturer	Lucki
Package	SMD3225-4P
Category	Crystals, Oscillators, Resonators
Pins	4

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Frequency stability		-30		30	ppm	All condition*: includes 25℃ tolerance, operating temperature range, input voltage change, aging, load change	3
Aging per year	Fa	-3		3	ppm	First Year	3
Operating temperature range	TOPR	-40		85	℃		3
Storage temperature	TSTG	-55		125	℃	Product itself only	3
Power supply voltage tolerance	VDD	-10		10	%		3
Output symmetry	Sym	45		55	%		3
Supply current	IDD			10	A		3
Rise time	Tr			5	ns	10%~90%VDD	3
Fall time	Tf			5	ns	90%~10%VDD	3
Start-up time				10	S		3
Nominal frequency	F0		50		MHz		3
Power supply voltage (nominal)	VDD		3.3		V		3
Output load (HCMOS)			15		pF		3

CAD (KiCad official)

Symbol: L32AOC050000PBL
Footprint: Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm
3D model: SMD3225-4P (KiCad packages3D, STEP)
3D model files: l32aoc050000pbl-etched.step / l32aoc050000pbl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l32aoc050000pbl.step / l32aoc050000pbl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Lucki datasheet (10 pp, sha256 4b53ff96e950b4b2, retrieved 2026-10-15, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# L32AOC050000PBL

**Lucki** · Crystal Oscillators · SMD3225-4P

L32AOC050000PBL from Lucki, in a SMD3225-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E/D | input | Enable/disable input: High or open enables the output at pin 3, Low puts pin 3 in high impedance, and Low combined with a floating pin is disallowed because pin 3 becomes unstable; VIH is 0.7*VDD to VDD and VIL is 0V to 0.3*VDD. |
| 2 | GND | power_in | Ground return for the oscillator; a 0.01uF bypass capacitor should be placed between VDD (pin 4) and this GND pin to minimize power supply line noise. |
| 3 | Output | output | HCMOS clock output at 50.000 MHz, active when pin 1 is High or open, with the advised load limited to 15 pF (driving only one CMOS/TTL gate). |
| 4 | VDD | power_in | Supply voltage of 3.3 V ±10%, to be decoupled to GND (pin 2) with a 0.01uF bypass capacitor. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Lucki |
| Package | SMD3225-4P |
| Category | Crystals, Oscillators, Resonators |
| Pins | 4 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Frequency stability |  | -30 |  | 30 | ppm | All condition*: includes 25℃ tolerance, operating temperature range, input voltage change, aging, load change | 3 |
| Aging per year | Fa | -3 |  | 3 | ppm | First Year | 3 |
| Operating temperature range | TOPR | -40 |  | 85 | ℃ |  | 3 |
| Storage temperature | TSTG | -55 |  | 125 | ℃ | Product itself only | 3 |
| Power supply voltage tolerance | VDD | -10 |  | 10 | % |  | 3 |
| Output symmetry | Sym | 45 |  | 55 | % |  | 3 |
| Supply current | IDD |  |  | 10 | A |  | 3 |
| Rise time | Tr |  |  | 5 | ns | 10%~90%VDD | 3 |
| Fall time | Tf |  |  | 5 | ns | 90%~10%VDD | 3 |
| Start-up time |  |  |  | 10 | S |  | 3 |
| Nominal frequency | F0 |  | 50 |  | MHz |  | 3 |
| Power supply voltage (nominal) | VDD |  | 3.3 |  | V |  | 3 |
| Output load (HCMOS) |  |  | 15 |  | pF |  | 3 |

## CAD (KiCad official)

- Symbol: `L32AOC050000PBL`
- Footprint: `Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm`
- 3D model: SMD3225-4P (KiCad packages3D, STEP)
- 3D model files: `l32aoc050000pbl-etched.step` / `l32aoc050000pbl-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `l32aoc050000pbl.step` / `l32aoc050000pbl.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Lucki datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602988104898650112) (10 pp, sha256 `4b53ff96e950b4b2`, retrieved 2026-10-15, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/l32aoc050000pbl-datasheet.pdf)