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L2N7002KLT1G

LRC · MOSFETs · SOT-23

L2N7002KLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the N-channel MOSFET; the maximum gate-to-source voltage is VGS ±20 Vdc.
2 Source passive Source terminal of the N-channel MOSFET; the source (body diode) current IS is limited to 300 mA.
3 Drain passive Drain terminal of the N-channel MOSFET; the drain-to-source voltage VDSS is 60 Vdc and the steady-state drain current is 320 mA at TA = 25°C.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage VDSS 60 Vdc 1
Gate-to-Source Voltage VGS -20 20 Vdc 1
Drain Current, steady state ID 320 mAdc Steady State, TA = 25°C 1
Drain Current, steady state ID 230 mAdc Steady State, TA = 85°C 1
Drain Current, t < 5 s ID 380 mAdc t < 5 s, TA = 25°C 1
Drain Current, t < 5 s ID 270 mAdc t < 5 s, TA = 85°C 1
Power Dissipation, steady state PD 300 mW Steady State (Note 1) 1
Power Dissipation, t < 5 s PD 420 mW t < 5 s (Note 1) 1
Pulsed Drain Current IDM 1.5 A tp = 10 µs 1
Operating Junction and Storage Temperature Range TJ, TSTG -55 150 °C 1
Source Current (Body Diode) IS 300 mA 1
Lead Temperature for Soldering Purposes TL 260 °C 1/8 in from case for 10 s 1
Gate-Source ESD Rating (HBM) ESD 2000 V HBM, Method 3015 1
Drain-to-Source Breakdown Voltage V(BR)DSS 60 V VGS = 0 V, ID = 250 µA 2
Zero Gate Voltage Drain Current, TJ = 25°C IDSS 1 µA VGS = 0 V, VDS = 60 V, TJ = 25°C 2
Zero Gate Voltage Drain Current, TJ = 125°C IDSS 500 µA VGS = 0 V, VDS = 60 V, TJ = 125°C 2
Zero Gate Voltage Drain Current (printed value 100 nA) 100 nA VGS = 0 V, VDS = 50 V, TJ = 25°C 2
Gate-to-Source Leakage Current IGSS 10 µA VDS = 0 V, VGS = 20 V 2
Gate Threshold Voltage VGS(TH) 1 2.5 V VGS = VDS, ID = 250 µA 2
Drain-to-Source On Resistance RDS(on) 2.3 Ω VGS = 10 V, ID = 500 mA 2
Drain-to-Source On Resistance RDS(on) 2.7 Ω VGS = 5.0 V, ID = 50 mA 2
Forward Diode Voltage, TJ = 25°C VSD 1.4 V VGS = 0 V, IS = 115 mA, TJ = 25°C 2
Forward Diode Voltage, TJ = 85°C VSD 0.7 V VGS = 0 V, IS = 115 mA, TJ = 85°C 2
Junction-to-Ambient, steady state RθJA 417 °C/W Steady State (Note 1) 2
Junction-to-Ambient, t ≤ 5 s RθJA 300 °C/W t ≤ 5 s (Note 1) 2

CAD (KiCad official)

  • Symbol: L2N7002KLT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: l2n7002klt1g-etched.step / l2n7002klt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); l2n7002klt1g.step / l2n7002klt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 a9dd29af5b1b31a0, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF