component
L297DM
Public Made by Adomby adom
HGSEMI Stepper Motor Driver, SOP-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| docs | 7d ago |
| viewers | 7d ago |
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| l297dm-etched.step | 7d ago |
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| README.md | 7d ago |
L297DM
HGSEMI · Stepper Motor Driver · SOP-20-300mil
L297DM from HGSEMI, in a SOP-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SYNC | bidirectional | Output of the on-chip chopper oscillator; SYNC pins of synchronized L297s are tied together with the oscillator components on only one device, and an external clock may be injected here (VSYNC high 3.3 V min and low 0.8 V max at Io = 5 mA). |
| 2 | GND | power_in | Ground connection. |
| 3 | HOME | output | Open-collector output that indicates the initial translator state (ABCD = 0101) when active, with leakage of 1 µA max at VCE = 7 V and saturation voltage of 0.4 V max at 5 mA. |
| 4 | A | output | Motor phase A drive signal for the power stage, with output low 0.4 V max at 10 mA and output high 3.9 V min at 5 mA. |
| 5 | INH1 | output | Active-low inhibit output for the driver stages of phases A and B, used for fast load-current decay in a bipolar bridge and by the chopper to regulate current when CONTROL is low; inhibit output low 0.4 V max at 10 mA and high 3.9 V min at 5 mA. |
| 6 | B | output | Motor phase B drive signal for the power stage, with output low 0.4 V max at 10 mA and output high 3.9 V min at 5 mA. |
| 7 | C | output | Motor phase C drive signal for the power stage, with output low 0.4 V max at 10 mA and output high 3.9 V min at 5 mA. |
| 8 | INH2 | output | Active-low inhibit output for the driver stages of phases C and D, with the same function as INH1; inhibit output low 0.4 V max at 10 mA and high 3.9 V min at 5 mA. |
| 9 | D | output | Motor phase D drive signal for the power stage, with output low 0.4 V max at 10 mA and output high 3.9 V min at 5 mA. |
| 10 | ENABLE | input | Chip enable input; when low (inactive) INH1, INH2, A, B, C and D are forced low, with input low max 1.3 V and high min 2 V. |
| 11 | CONTROL | input | Control input defining the chopper action: when low the chopper acts on INH1 and INH2, when high it acts on phase lines ABCD; input low max 0.6 V and high min 2 V. |
| 12 | Vs | power_in | 5 V supply input, specified at 4.75 V min to 7 V max with a quiescent supply current of 50 mA typ and 80 mA max (outputs floating); absolute maximum 10 V. |
| 13 | SENS2 | input | Load current sense voltage input from the power stages of phases C and D, with comparator offset of 5 mV max at Vref = 1 V and bias current of -100 to 10 µA. |
| 14 | SENS1 | input | Load current sense voltage input from the power stages of phases A and B, with comparator offset of 5 mV max at Vref = 1 V and bias current of -100 to 10 µA. |
| 15 | Vref | power_in | Reference voltage for the chopper circuit that sets the peak load current, specified over 0 V to 3 V. |
| 16 | OSC | passive | Connection for an RC network (R to VCC, C to ground) that sets the chopper rate with f ≅ 1/0.69RC; grounded on all devices except the one carrying the oscillator in synchronized multi-L297 configurations. |
| 17 | CW/CCW | input | Clockwise/counterclockwise direction control input, internally synchronized so direction can be changed at any time; input low max 0.6 V and high min 2 V. |
| 18 | CLOCK | input | Step clock input that advances the motor one increment on the rising edge of an active-low pulse, with minimum clock time tCLK of 0.5 µs; input low max 0.6 V and high min 2 V. |
| 19 | HALF/FULL | input | Half/full step select input: high selects half-step operation and low selects full-step operation; input low max 0.6 V and high min 2 V. |
| 20 | RESET | input | Active-low reset input that restores the translator to the home position (state 1, ABCD = 0101); reset time tR of 1 µs min and reset-to-clock delay of 1 µs min apply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-20-300mil |
| Category | Motor Driver ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (pin 12) | Vs | 4.75 | 7 | V | 6 | ||
| Quiescent supply current (pin 12) | Is | 50 | 80 | mA | Outputs floating | 6 | |
| Input voltage low (pins 11, 17, 18, 19, 20) | Vi | 0.6 | V | Low | 6 | ||
| Input voltage high (pins 11, 17, 18, 19, 20) | Vi | 2 | V | High | 6 | ||
| Input current (pins 11, 17, 18, 19, 20) | Ii | 100 | µA | Vi = L | 6 | ||
| Input current (pins 11, 17, 18, 19, 20) | Ii | 10 | µA | Vi = H | 6 | ||
| Enable input voltage low (pin 10) | Ven | 1.3 | V | Low | 6 | ||
| Enable input voltage high (pin 10) | Ven | 2 | V | High | 6 | ||
| Enable input current (pin 10) | Ien | 100 | µA | Ven = L | 6 | ||
| Enable input current (pin 10) | Ien | 10 | µA | Ven = H | 6 | ||
| Phase output voltage low (pins 4, 6, 7, 9) | VOL | 0.4 | V | Io = 10mA | 6 | ||
| Phase output voltage high (pins 4, 6, 7, 9) | VOH | 3.9 | V | Io = 5mA | 6 | ||
| Inhibit output voltage low (pins 5, 8) | Vinh L | 0.4 | V | Io = 10mA | 6 | ||
| Inhibit output voltage high (pins 5, 8) | Vinh H | 3.9 | V | Io = 5mA | 6 | ||
| Sync output voltage high (pin 1) | VSYNC H | 3.3 | V | Io = 5mA | 6 | ||
| Sync output voltage low (pin 1) | VSYNC L | 0.8 | V | Io = 5mA | 6 | ||
| Leakage current (pin 3) | Ileak | 1 | µA | VCE = 7V | 7 | ||
| Saturation voltage (pin 3) | Vsat | 0.4 | V | I = 5 mA | 7 | ||
| Comparators offset voltage (pins 13, 14, 15) | Voff | 5 | mV | Vref = 1 V | 7 | ||
| Comparator bias current (pins 13, 14, 15) | Io | -100 | 10 | µA | 7 | ||
| Input reference voltage (pin 15) | Vref | 0 | 3 | V | 7 | ||
| Clock time | tCLK | 0.5 | µs | 7 | |||
| Set up time | tS | 1 | µs | 7 | |||
| Hold time | tH | 4 | µs | 7 | |||
| Reset time | tR | 1 | µs | 7 | |||
| Reset to clock delay | tRCLK | 1 | µs | 7 | |||
| Supply voltage (pin 12) | Vs | 10 | V | 1 | |||
| Input signals | Vi | 7 | V | 1 | |||
| Total power dissipation | Ptot | 1 | W | Tamb = 70°C | 1 | ||
| Storage and junction temperature | Tstg, Tj | -40 | 150 | °C | 1 | ||
| Thermal resistance junction-ambient (SO20) | Rth-j-amb | 100 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
L297DM - Footprint:
Package_SO:SOP-20_7.5x12.8mm_P1.27mm - 3D model: SOP-20-300mil, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
l297dm-etched.step/l297dm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);l297dm.step/l297dm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (8 pp, sha256
bbdff7f0738894f2, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).