KSZ9897RTXI-TR

{
  "slug": "ksz9897rtxi-tr",
  "version": "0.1.0",
  "type": "component",
  "description": "Microchip Tech Interface - Specialized, TQFP-128(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "communication interface chip-uart-485-232",
    "ksz9897rtxi-tr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
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    "README.md",
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    "docs/ksz9897rtxi-tr-datasheet.pdf",
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  "component": {
    "mpn": "KSZ9897RTXI-TR",
    "manufacturer": "Microchip Tech",
    "package": "TQFP-128(14x14)",
    "pin_count": 128,
    "category": "Communication Interface Chip/UART/485/232",
    "subcategory": "Interface - Specialized",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/830a9ec6e45d8cbf1c01b4a68523d9f4.pdf",
    "parts": {
      "symbol": "ksz9897rtxi-tr.kicad_sym",
      "footprint": "ksz9897rtxi-tr.kicad_mod",
      "model_3d": "ksz9897rtxi-tr-hero.glb",
      "model_3d_plain": "ksz9897rtxi-tr-etched.glb",
      "model_3d_step": "ksz9897rtxi-tr-etched.step",
      "model_3d_step_plain": "ksz9897rtxi-tr.step",
      "lbr": "ksz9897rtxi-tr.lbr"
    },
    "distributor_links": {
      "lcsc": "C631694",
      "digikey": "KSZ9897RTXI-TR-ND",
      "mouser": "579-KSZ9897RTXI-TR"
    },
    "distributor_check": {
      "checked_at": "2026-10-26T23:43:55Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "KSZ9897RTXI-TR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "579-KSZ9897RTXI-TR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "TXRX1P_A",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair A positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "2",
        "name": "TXRX1M_A",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair A negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "3",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "4",
        "name": "TXRX1P_B",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair B positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "5",
        "name": "TXRX1M_B",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair B negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "6",
        "name": "TXRX1P_C",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair C positive."
      },
      {
        "number": "7",
        "name": "TXRX1M_C",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair C negative."
      },
      {
        "number": "8",
        "name": "TXRX1P_D",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair D positive."
      },
      {
        "number": "9",
        "name": "TXRX1M_D",
        "type": "passive",
        "description": "Port 1 1000BASE-T differential data pair D negative."
      },
      {
        "number": "10",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers and XI/XO clock interface."
      },
      {
        "number": "11",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "12",
        "name": "TXRX2P_A",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair A positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "13",
        "name": "TXRX2M_A",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair A negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "14",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "15",
        "name": "TXRX2P_B",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair B positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "16",
        "name": "TXRX2M_B",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair B negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "17",
        "name": "TXRX2P_C",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair C positive."
      },
      {
        "number": "18",
        "name": "TXRX2M_C",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair C negative."
      },
      {
        "number": "19",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "20",
        "name": "TXRX2P_D",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair D positive."
      },
      {
        "number": "21",
        "name": "TXRX2M_D",
        "type": "passive",
        "description": "Port 2 1000BASE-T differential data pair D negative."
      },
      {
        "number": "22",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers and XI/XO clock interface."
      },
      {
        "number": "23",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "24",
        "name": "TXRX3P_A",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair A positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "25",
        "name": "TXRX3M_A",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair A negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "26",
        "name": "TXRX3P_B",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair B positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "27",
        "name": "TXRX3M_B",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair B negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "28",
        "name": "TXRX3P_C",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair C positive."
      },
      {
        "number": "29",
        "name": "TXRX3M_C",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair C negative."
      },
      {
        "number": "30",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "31",
        "name": "TXRX3P_D",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair D positive."
      },
      {
        "number": "32",
        "name": "TXRX3M_D",
        "type": "passive",
        "description": "Port 3 1000BASE-T differential data pair D negative."
      },
      {
        "number": "33",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers and XI/XO clock interface."
      },
      {
        "number": "34",
        "name": "TXRX4P_A",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair A positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "35",
        "name": "TXRX4M_A",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair A negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "36",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "37",
        "name": "TXRX4P_B",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair B positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "38",
        "name": "TXRX4M_B",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair B negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "39",
        "name": "TXRX4P_C",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair C positive."
      },
      {
        "number": "40",
        "name": "TXRX4M_C",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair C negative."
      },
      {
        "number": "41",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "42",
        "name": "TXRX4P_D",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair D positive."
      },
      {
        "number": "43",
        "name": "TXRX4M_D",
        "type": "passive",
        "description": "Port 4 1000BASE-T differential data pair D negative."
      },
      {
        "number": "44",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers and XI/XO clock interface."
      },
      {
        "number": "45",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "46",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection."
      },
      {
        "number": "47",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection."
      },
      {
        "number": "48",
        "name": "TX_CLK6/REFCLKI6",
        "type": "bidirectional",
        "description": "Port 6 25/2.5MHz MII transmit clock (input in MAC mode) or 50MHz RMII reference clock input, or 125/25/2.5MHz RGMII transmit clock input; powered from VDDIO."
      },
      {
        "number": "49",
        "name": "TX_EN6/TX_CTL6",
        "type": "input",
        "description": "Port 6 transmit enable in MII/RMII modes or transmit control in RGMII mode, with internal pull-down."
      },
      {
        "number": "50",
        "name": "TX_ER6",
        "type": "input",
        "description": "Port 6 MII transmit error input; not used in RMII or RGMII modes and should not be connected in those modes."
      },
      {
        "number": "51",
        "name": "COL6",
        "type": "bidirectional",
        "description": "Port 6 MII collision detect (output in PHY mode, input in MAC mode); not used in RMII or RGMII modes and should not be connected."
      },
      {
        "number": "52",
        "name": "TXD6_3",
        "type": "input",
        "description": "Port 6 MII/RGMII transmit data bus bit 3; not used in RMII mode and should not be connected in that mode."
      },
      {
        "number": "53",
        "name": "TXD6_2",
        "type": "input",
        "description": "Port 6 MII/RGMII transmit data bus bit 2; not used in RMII mode and should not be connected in that mode."
      },
      {
        "number": "54",
        "name": "TXD6_1",
        "type": "input",
        "description": "Port 6 MII/RMII/RGMII transmit data bus bit 1."
      },
      {
        "number": "55",
        "name": "TXD6_0",
        "type": "input",
        "description": "Port 6 MII/RMII/RGMII transmit data bus bit 0."
      },
      {
        "number": "56",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "57",
        "name": "RX_CLK6/REFCLKO6",
        "type": "bidirectional",
        "description": "Port 6 MII receive clock (output in PHY mode), RMII 50MHz reference clock output in clock mode, or RGMII 125/25/2.5MHz receive clock output."
      },
      {
        "number": "58",
        "name": "RX_DV6/CRS_DV6/RX_CTL6",
        "type": "output",
        "description": "Port 6 MII receive data valid, RMII carrier sense/receive data valid, or RGMII receive control output; also a configuration strap pin."
      },
      {
        "number": "59",
        "name": "RX_ER6",
        "type": "output",
        "description": "Port 6 MII receive error output; not used in RMII or RGMII modes and should not be connected in those modes."
      },
      {
        "number": "60",
        "name": "CRS6",
        "type": "bidirectional",
        "description": "Port 6 MII carrier sense (output in PHY mode, input in MAC mode); not used in RMII or RGMII modes and should not be connected."
      },
      {
        "number": "61",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+3.3V, +2.5V or +1.8V I/O power supply for the digital I/Os."
      },
      {
        "number": "62",
        "name": "RXD6_3",
        "type": "output",
        "description": "Port 6 MII/RGMII receive data bus bit 3 and configuration strap pin; not used in RMII mode."
      },
      {
        "number": "63",
        "name": "RXD6_2",
        "type": "output",
        "description": "Port 6 MII/RGMII receive data bus bit 2 and configuration strap pin; not used in RMII mode."
      },
      {
        "number": "64",
        "name": "RXD6_1",
        "type": "output",
        "description": "Port 6 MII/RMII/RGMII receive data bus bit 1 and configuration strap pin."
      },
      {
        "number": "65",
        "name": "RXD6_0",
        "type": "output",
        "description": "Port 6 MII/RMII/RGMII receive data bus bit 0 and configuration strap pin."
      },
      {
        "number": "66",
        "name": "TX_CLK7/REFCLKI7",
        "type": "bidirectional",
        "description": "Port 7 MII transmit clock (input in MAC mode), RMII 50MHz reference clock input, or RGMII 125/25/2.5MHz transmit clock input; powered from VDDIO."
      },
      {
        "number": "67",
        "name": "TX_EN7/TX_CTL7",
        "type": "input",
        "description": "Port 7 transmit enable in MII/RMII modes or transmit control in RGMII mode, with internal pull-down."
      },
      {
        "number": "68",
        "name": "TX_ER7",
        "type": "input",
        "description": "Port 7 MII transmit error input; not used in RMII or RGMII modes and should not be connected in those modes."
      },
      {
        "number": "69",
        "name": "COL7",
        "type": "bidirectional",
        "description": "Port 7 MII collision detect (output in PHY mode, input in MAC mode); not used in RMII or RGMII modes and should not be connected."
      },
      {
        "number": "70",
        "name": "TXD7_3",
        "type": "input",
        "description": "Port 7 MII/RGMII transmit data bus bit 3; not used in RMII mode and should not be connected in that mode."
      },
      {
        "number": "71",
        "name": "TXD7_2",
        "type": "input",
        "description": "Port 7 MII/RGMII transmit data bus bit 2; not used in RMII mode and should not be connected in that mode."
      },
      {
        "number": "72",
        "name": "TXD7_1",
        "type": "input",
        "description": "Port 7 MII/RMII/RGMII transmit data bus bit 1."
      },
      {
        "number": "73",
        "name": "TXD7_0",
        "type": "input",
        "description": "Port 7 MII/RMII/RGMII transmit data bus bit 0."
      },
      {
        "number": "74",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "75",
        "name": "RX_CLK7/REFCLKO7",
        "type": "bidirectional",
        "description": "Port 7 MII receive clock (output in PHY mode), RMII 50MHz reference clock output in clock mode, or RGMII 125/25/2.5MHz receive clock output."
      },
      {
        "number": "76",
        "name": "RX_DV7/CRS_DV7/RX_CTL7",
        "type": "output",
        "description": "Port 7 MII receive data valid, RMII carrier sense/receive data valid, or RGMII receive control output; also a configuration strap pin."
      },
      {
        "number": "77",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+3.3V, +2.5V or +1.8V I/O power supply for the digital I/Os."
      },
      {
        "number": "78",
        "name": "RX_ER7",
        "type": "output",
        "description": "Port 7 MII receive error output; not used in RMII or RGMII modes and should not be connected in those modes."
      },
      {
        "number": "79",
        "name": "CRS7",
        "type": "bidirectional",
        "description": "Port 7 MII carrier sense (output in PHY mode, input in MAC mode); not used in RMII or RGMII modes and should not be connected."
      },
      {
        "number": "80",
        "name": "RXD7_3",
        "type": "output",
        "description": "Port 7 MII/RGMII receive data bus bit 3 and configuration strap pin; not used in RMII mode."
      },
      {
        "number": "81",
        "name": "RXD7_2",
        "type": "output",
        "description": "Port 7 MII/RGMII receive data bus bit 2 and configuration strap pin; not used in RMII mode."
      },
      {
        "number": "82",
        "name": "RXD7_1",
        "type": "output",
        "description": "Port 7 MII/RMII/RGMII receive data bus bit 1 and configuration strap pin."
      },
      {
        "number": "83",
        "name": "RXD7_0",
        "type": "output",
        "description": "Port 7 MII/RMII/RGMII receive data bus bit 0 and configuration strap pin."
      },
      {
        "number": "84",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection."
      },
      {
        "number": "85",
        "name": "LED4_0",
        "type": "output",
        "description": "Port 4 LED indicator 0, active low output that sinks current to light an LED; also a configuration strap pin."
      },
      {
        "number": "86",
        "name": "LED4_1",
        "type": "output",
        "description": "Port 4 LED indicator 1, active low output that sinks current to light an LED; also a configuration strap pin."
      },
      {
        "number": "87",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "88",
        "name": "LED3_0",
        "type": "output",
        "description": "Port 3 LED indicator 0, active low output that sinks current to light an LED."
      },
      {
        "number": "89",
        "name": "LED3_1",
        "type": "output",
        "description": "Port 3 LED indicator 1, active low output that sinks current to light an LED; also a configuration strap pin."
      },
      {
        "number": "90",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; must be left unconnected for proper operation."
      },
      {
        "number": "91",
        "name": "LED2_0",
        "type": "output",
        "description": "Port 2 LED indicator 0, active low output that sinks current to light an LED; also a configuration strap pin."
      },
      {
        "number": "92",
        "name": "LED2_1",
        "type": "output",
        "description": "Port 2 LED indicator 1, active low output that sinks current to light an LED; also a configuration strap pin."
      },
      {
        "number": "93",
        "name": "PME_N",
        "type": "output",
        "description": "Power management event output, active low by default, indicating an energy detect event to wake the system; requires an external pull-up for active-low operation."
      },
      {
        "number": "94",
        "name": "INTRP_N",
        "type": "output",
        "description": "Active low open-drain interrupt output that requires an external pull-up resistor; also the NAND tree output."
      },
      {
        "number": "95",
        "name": "CLKO_25_125",
        "type": "output",
        "description": "25/125MHz reference clock output derived from the crystal input, powered from VDDIO."
      },
      {
        "number": "96",
        "name": "RESET_N",
        "type": "input",
        "description": "Active low system reset that must be asserted during or after power-on, with an RC circuit suggested for power-on reset."
      },
      {
        "number": "97",
        "name": "SDO",
        "type": "output",
        "description": "SPI data output (MISO); not used in I2C or MIIM modes."
      },
      {
        "number": "98",
        "name": "SDI/SDA/MDIO",
        "type": "bidirectional",
        "description": "SPI data input (MOSI), I2C data, or MIIM data in/out; open-drain in output state and requires an external 1.0kΩ to 4.7kΩ pull-up to VDDIO."
      },
      {
        "number": "99",
        "name": "VDDIO",
        "type": "power_in",
        "description": "+3.3V, +2.5V or +1.8V I/O power supply for the digital I/Os."
      },
      {
        "number": "100",
        "name": "SCS_N",
        "type": "input",
        "description": "SPI chip select, active low; not used in I2C or MIIM modes."
      },
      {
        "number": "101",
        "name": "SCL/MDC",
        "type": "input",
        "description": "SPI/I2C serial clock or MIIM management clock (MDC) input to the slave device."
      },
      {
        "number": "102",
        "name": "LED5_0",
        "type": "output",
        "description": "Port 5 LED indicator 0, active low output that sinks current to light an LED."
      },
      {
        "number": "103",
        "name": "LED5_1",
        "type": "output",
        "description": "Port 5 LED indicator 1, active low output that sinks current to light an LED; also a configuration strap pin."
      },
      {
        "number": "104",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "105",
        "name": "LED1_0",
        "type": "output",
        "description": "Port 1 LED indicator 0, active low output that sinks current to light an LED."
      },
      {
        "number": "106",
        "name": "LED1_1",
        "type": "output",
        "description": "Port 1 LED indicator 1, active low output that sinks current to light an LED; also a configuration strap pin."
      },
      {
        "number": "107",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection."
      },
      {
        "number": "108",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect; must be left unconnected for proper operation."
      },
      {
        "number": "109",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection."
      },
      {
        "number": "110",
        "name": "DVDDL",
        "type": "power_in",
        "description": "+1.2V digital core power supply."
      },
      {
        "number": "111",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers and XI/XO clock interface."
      },
      {
        "number": "112",
        "name": "TXRX5P_A",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair A positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "113",
        "name": "TXRX5M_A",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair A negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "114",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "115",
        "name": "TXRX5P_B",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair B positive; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "116",
        "name": "TXRX5M_B",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair B negative; 100BASE-TX and 10BASE-Te also use the A and B pairs."
      },
      {
        "number": "117",
        "name": "TXRX5P_C",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair C positive."
      },
      {
        "number": "118",
        "name": "TXRX5M_C",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair C negative."
      },
      {
        "number": "119",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "120",
        "name": "TXRX5P_D",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair D positive."
      },
      {
        "number": "121",
        "name": "TXRX5M_D",
        "type": "passive",
        "description": "Port 5 1000BASE-T differential data pair D negative."
      },
      {
        "number": "122",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers and XI/XO clock interface."
      },
      {
        "number": "123",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection."
      },
      {
        "number": "124",
        "name": "AVDDL",
        "type": "power_in",
        "description": "+1.2V analog power supply for the PHY core."
      },
      {
        "number": "125",
        "name": "XO",
        "type": "output",
        "description": "Crystal clock output connected to one crystal lead for 25MHz crystal use; left unconnected when an oscillator drives XI."
      },
      {
        "number": "126",
        "name": "XI",
        "type": "input",
        "description": "Crystal clock or oscillator input requiring 25MHz with ±50ppm tolerance."
      },
      {
        "number": "127",
        "name": "ISET",
        "type": "passive",
        "description": "Transmit output current set resistor, which must connect to GND through a 6.04kΩ 1% resistor."
      },
      {
        "number": "128",
        "name": "AVDDH",
        "type": "power_in",
        "description": "+2.5V analog power supply for the PHY transceivers and XI/XO clock interface."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package taken from MPN suffix T (128-lead TQFP-EP, 14x14 mm), per datasheet Table 3-1; the -TR suffi; Schema has no analog type, so the AIO pins (TXRX*_A..D) and ISET are mapped to passive. Pin directio; The exposed pad (must be connected to GND with a via field) is not a numbered pin and is not listed;",
          "60/128 pins cited to the wrong page (name found elsewhere): ['19:AVDDL@p15', '22:AVDDH@p15', '23:DVDDL@p15', '30:AVDDL@p15']"
        ],
        "pages_sent": 50,
        "cost_usd": 0.1074,
        "at": "2026-10-26T23:43:03"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/830a9ec6e45d8cbf1c01b4a68523d9f4.pdf",
        "pages": 196,
        "sha256": "72b89179ed6a42a7",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 128,
        "described": 128,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ksz9897rtxi-tr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          16.0,
          16.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b8d257b30f25cdf1e0f6a8c639d98f6174f71f83f9b50ea0ca10c4bbb58ee28",
        "checked": "2026-10-26",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ksz9897rtxi-tr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          16.0,
          16.0,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "a14b000abbd7ef68bbe901626fea5a0e1891029a9295611b910cf25238b70f93",
        "checked": "2026-10-26",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}